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The 4256 is a 256K x 1 Dynamic Ram. This predates sdram and even EDO. I have plenty of circuits that use them and could find you an example but no data sheets. From memory (no pun intended) they run off +5V and have 9 multiplexed address lines. You apply the upper nine bits of the address and generate a pulse on the RAS (row address strobe) Some small period of time later (10nS?) you apply the lower nine bits and generate a CAS (Column address strobe). Data then goes in or out depending on the value of the write signal. The main problem with them is that they have to be refreshed by reading from each bit every so many milliseconds. I think that by the time the 4256 came out the refresh was RAS only but this still meant complicated timing and counting circuitry. I think that the only use for them today is repairing obsolete equipment. It would be far easier and cheaper to use a cheap static ram.
If you wish to have a datasheet posted here please email myself at electro.tech.online.com [dot] gmail.com with the pdf, title and short description. If you have any amendments to the list or notice any errors please do PM myself or one of our moderators.
Well I dense I think because it failed to deliver... I sent it the second time to electro.tech.online.com.@gmail.com returned also. Don't know what to do now. Sorry!
Well I dense I think because it failed to deliver... I sent it the second time to electro.tech.online.com.@gmail.com returned also. Don't know what to do now. Sorry!
The 4256 is a 256K x 1 Dynamic Ram. This predates sdram and even EDO. I have plenty of circuits that use them and could find you an example but no data sheets. From memory (no pun intended) they run off +5V and have 9 multiplexed address lines. You apply the upper nine bits of the address and generate a pulse on the RAS (row address strobe) Some small period of time later (10nS?) you apply the lower nine bits and generate a CAS (Column address strobe). Data then goes in or out depending on the value of the write signal. The main problem with them is that they have to be refreshed by reading from each bit every so many milliseconds. I think that by the time the 4256 came out the refresh was RAS only but this still meant complicated timing and counting circuitry. I think that the only use for them today is repairing obsolete equipment. It would be far easier and cheaper to use a cheap static ram.
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Thanks for putting up with clumsy attempts to help. 
