Hi,
I am currently working on my final year and I am trying to interface an FPGA via UBS. I am having some problems tho...all the documentation I have looked at is really confusing. I am using an ALTERA FPGA however I am considering using a XILINK one because I have been told they are easier to use. Also I have only just started using FPGA's :s
Any help would be appreciated!
Thanks
I am currently working on my final year and I am trying to interface an FPGA via UBS. I am having some problems tho...all the documentation I have looked at is really confusing. I am using an ALTERA FPGA however I am considering using a XILINK one because I have been told they are easier to use. Also I have only just started using FPGA's :s
Any help would be appreciated!
Thanks