Gate Driver for Current-Fed Converters

Shadow_warrior said:

No, I want to make B.

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A and B are almost the same circuit.

In B it is easy to see the boost circuit & the full bridge. The bridge could be set at 50%. Because there are two circuits it is easy to see how it works. I also like the idea the bridge could be set to switch when the boost MOSFET is on so there is no switching losses.

In A (when all 4 MOSFETs are on = when boost MOSFET is on)

kubeek said:

when both igbts are on at the same time - a shoot-through.

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As Kubeek said; normally turning all MOSFETs on is bad news. But in this type of circuit it is used to make a boost supply circuit. Only in this case it is OK to have "bad timing" for driving the transistors.

kubeek said:

In your current fed topology this is not the case, becase basically constant current flows there, and when both igbts are on at the same time, it is still only that current flowing and you don´t get the sharp increase in current as in voltage fed topology.

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Yes, but what will happen if one of the mosfets fail, then there will be Open Circuit fault which will create high voltage spikes and fail other mosfets too. I want protection to avoid this.

d

ronsimpson said:

As Kubeek said; normally turning all MOSFETs on is bad news. But in this type of circuit it is used to make a boost supply circuit. Only in this case it is OK to have "bad timing" for driving the transistors.

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So should I go for individual Gate drivers for each switches.

Also If at some point of time my mosfets come into active region due to large over currents, how will I remove it from saturation . this is why I needed de-sat protection.

kubeek said:

n your current fed topology this is not the case, becase basically constant current flows there, and when both igbts are on at the same time, it is still only that current flowing and you don´t get the sharp increase in current as in voltage fed topology.

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Also, I should Choose IC in which UVLO is either programmable or does not have this feature

Shadow_warrior said:

So should I go for individual Gate drivers for each switches.

Also If at some point of time my mosfets come into active region due to large over currents, how will I remove it from saturation . this is why I needed de-sat protection.

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Not sure what you mean, every mosfet or igbt needs a proper gate driver. Whether it is an IC with two drivers for one half of the bridge, or some other arrangement doesn´t matter.
There is no de-sat protection for mosfets, becasue the are normally run in linear region, and saturation is something to avoid, and not de-seaturation.
In any case, the best way is to monitor current by a shunt resistor on the negative rail, and if it exceeds some prest current then shut everything off. This also takes care of keeping the inductor out of saturation, which is the most important thing to monitor.

Why do you not want UVLO?

I think this circuit(s) have a problem that if one MOSFET dies, very likely all MOSFETs will die. ( the supply will die "big time") Use a fuse!

If the output is shorted there will be a big problem. (most boost supplies do not like a shorted output)

I think that if one fet dies, you still can recognize that, because the current throuth the main inductor won´t be a sawtooth anymore and will start rising. That should trigger an overcurrent fault in any case and stop the whole converter.

kubeek said:

if one fet dies

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Circuit B and A: The question back to post #1; What happens if one of the bridge FETs opens up dead.
The input inductor wants to "flyback" or jump upwards. If one of the FETs is open there will be no limit to the voltage. Volts will go up at 100s volts/uS until silicon breaks. I can clamp that in a lossles way but ..... (more on that later)

The other question from #1 is what happens if one of the FETs dies closed. This will put a short from the inductor to ground. Current will ramp up until the inductor saturates. Then current will go way up and pop the fuse.

I think the real fear is what happens when a micro computer makes the gate drive signals. If the signals are wrong or if the software fails, you will brake silicon. That is why I used a PWM IC and a toggle flip flop to make the signals. I would use a current mode IC. Not a voltage mode.

Short circuit in a boost power supply.
E is typical boost supply. If the load is shorted out there is no current limit.
F is a supply where is the load is shorted the IC sees the current and turns off the FET and saves the fuse.

One of the questions is; what happns in a boost supply with no load. If the no load is because something broke in the bridge the voltage will go up to 1000 volts in nS and things will brake.
Circuit G has a catch winding. I have only used catch windings at 1:1 turn ratio. If Vin = 25V the output can not go above 50V because the catch winding will dump any extra voltage back into the input supply. This is how I would limit the boost voltage to a safe level if things go wrong.

ronsimpson said:

Short circuit in a boost power supply.
E is typical boost supply. If the load is shorted out there is no current limit.
F is a supply where is the load is shorted the IC sees the current and turns off the FET and saves the fuse.
View attachment 114605
One of the questions is; what happns in a boost supply with no load. If the no load is because something broke in the bridge the voltage will go up to 1000 volts in nS and things will brake.
Circuit G has a catch winding. I have only used catch windings at 1:1 turn ratio. If Vin = 25V the output can not go above 50V because the catch winding will dump any extra voltage back into the input supply. This is how I would limit the boost voltage to a safe level if things go wrong.

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Thankyou so much. I got some idea.

A fets generally die shorted, I was thinking about F, but thank you for the idea about catch winding in case something goes open..