Generate continuous random bit stream from noise

[undelivered]

Hi, I am developing a project for Uni at an EEE student which has various stages but I'm struggling with the generation of a random stream of bits from noise which will feed into a shift register. I am attaching the schematic in the hope someone can make some suggestions.

The supply is +6V and -6V
The circuit uses a reverse biased zener 1N4733ATR to generate noise.
This is then amplified by an LM358 Op Amp which I was hoping for around -50mA to +50mA centred at 0.
This goes into a LM393 comparator with a pot to try and centre the output.
Finally I pass it through an IN4148 diode to so that I get either 6V (or 5+ V) or 0V output which goes into the CMOS shift register.

I don’t want to use an MCU.

I'm getting inconsistent results. It seems quite overly sensitive and gives different levels of noise. I'm also not convinced it is random and looking at the output from the op amp on the oscilloscope there may be some oscillation there though I tried to filter out any possible mains interference with RD filter after the amp.

Even if it was complete random I am seeing drift of the centre point and have to tweak the pot so I do get an equal share of 1's and 0's.

This is all quite new to me so please be quite specific about any feedback so I can understand clearly.

Thanks in advance.

 

[BobW]

Several years ago, I needed a random bit stream for a microprocessor project. I built this circuit.

It runs off of 5 volts. The left hand side of the circuit is a charge pump to increase voltage to the transistor stages. They can be eliminated if you have a higher voltage available (about 20V IIRC). The 2N2222 transistor with unconnected collector operates in avalanche mode to generate white noise which is amplified by the other two transistors. It's then converted to a digital bit by the 74HC14, and goes to the microprocessor input.

In the program code, it uses Von Neumann's de-biassing technique to remove bias from the input bit stream:
Look at two successive bits. If they are both the same, then discard them. If they are different, use the first bit and discard the second. Warning: This algorithm can slow things down significantly if the input bit stream is highly biassed.

Edited to add:
Re-reading your original post, it appears that your main problem is a bias in the bits. Since you don't want to use an MCU, you could use your existing circuit, but implement the Von Neumann de-biassing in discrete logic. The problem is that this will affect the bit rate of your final bit stream. It won't be constant, and so you'll have to have some sort of buffer.

Another possible solution, if you can adjust the bit frequency bias by applying a DC bias somewhere in the circuit, you could provide a feedback signal to adjust that DC bias in order to cancel out the bit frequency bias. This is what I did in my circuit with the feedback components around the output Schmitt inverter gate.