Miles, why did you include 2 ln(2) in the equation?
Shouldn't it just be 1/(2RC) for the frequency.
The astable circuit given in a previous post operates as follows.
When Q(1) goes into saturation, it connects the positively charged plate(s) of Q(2)'s timing capacitor to ground. If you ground the positive side of a capacitor, the opposite plate(s) must become negative with respect to ground. That negative voltage turns Q(2) off. This allows Q(1)'s timing capacitor to charge to V(cc) through R(c), ready for the next half-cycle. This occurs as the negative voltage at the base of Q(2) charges towards V(cc) through the base resistor. Once this voltage reaches ~0.6 V, Q(2) turns on, saturates, and forces Q(1) off. Each transistor therefore completes one cycle: t= t(1) + t(2). That would account for the factor of "2" in the frequency calculation.
Now take a LQQK at the enclosed diagram. This gives the situation which occurs as you charge a capacitor through a resistor. If you consider a capacitor charging to: V(c)= 0.5V(DC), and solve the equation for t, you will see that this becomes: t= RCln(2). If you drop the ln(2) term, then you will get:
V(c)= 0.6321V(DC), which is greater than 0.5V(DC). It will never arrive at that value, since the transistor will already have turned on.
Where: ln(2) is the "natural" (so called since these logarithms "naturally" give the easiest solutions to differential equations) log of 2. ln(2)= 0.693147180560 (approx). That's where 2ln(2) comes from.