I2C interface protection, Anyone put values on components for me?

[calltronics]

I have to reverse engineer this interface to the microchip memory.
Anyone shed anylight on the value of the Zener.
Also the capacitors.
Vcc is 3.3V.
The circuit is part of a battery block that plugs into a defibulator.

Appreciate your help

 

[rjenkinsgb]

I'd guess it is 3V, to allow a 5V memory to connect with a 3.3V MCU.

 

[danadak]

Odd, the part operating range is :

OP, do you know what the Vcc of the EEPROM and that of the MCU ?

Are the caps shown on SDA and SCL parasitic representations, buss approximations,
or real caps ? Odd to see caps added to those lines.......


Regards, Dana.

 

[Nigel Goodwin]

Odd, the part operating range is :

View attachment 141402

OP, do you know what the Vcc of the EEPROM and that of the MCU ?

Are the caps shown on SDA and SCL parasitic representations, buss approximations,
or real caps ? Odd to see caps added to those lines.......


Regards, Dana.

I agree, VERY odd to show capacitors on the I2C bus, good suggestion of possible parasitic capacitance.

Other than that, they would have to be very low values, and no point in them being there.

As for the zener?, that seems pointless as well - although I suppose it could be a vague effort to prevent EEPROM corruption? - if the OP really wants to add one?, then I would suggest 5.6V (assuming 5V Vcc).

However, as always with these posts - it's far too vague, and we need the schematic that it connects to.

 

[tumbleweed]

I agree... with the exception of C4 I wouldn't think installing ANY of those components is going to be a good idea.

Is the memory located on a different board or something?

 

[Nigel Goodwin]

I agree... with the exception of C4 I wouldn't think installing ANY of those components is going to be a good idea.

Is the memory located on a different board or something?

I had to go back and look where C4 was - it was where I presumed!.

 

[Diver300]

The pull-up resistors aren’t shown.

I have used very small capacitors on I2C lines to protect against very high frequency interference. The time constant of the capacitor and the pull-up resistance has to be much less than the clock frequency. Even if the clock frequency is low, the clock rise time must be fast enough that the slaves can only see one edge.

 

[danadak]

This might of use regarding calculations for the buss, attached.

Regards, Dana.

 

[ronsimpson]

The clock and data lines must pull low, through the 100 ohm resistor. The bus will not have good low levels when this part is taking. This reduces the noise margins.
Why only one Zener not two or ever three?
Most designers try to reduce the capacitance on the bus, not add capacitors.

 

[Pommie]

Whenever I've used I²C, I've just used pullups to the lowest Vcc and never had a problem.


What is this protection?

Mike.

 

[Papabravo]

Whenever I've used I²C, I've just used pullups to the lowest Vcc and never had a problem.


What is this protection?

Mike.

If you look at the I2C specification, they recommend nothing more than pullup resistors limited in value to a specific range which is intricately detailed in the specification. Anything else you put on the bus you do at your own risk. the people who write specifications usually know what they are doing, and the review process is also self-correcting.

 

[schmitt trigger]

You can always use a bidirectional level shifter circuit.
If you don’t want to roll your own, Amazon, Ebay and other E-commerce websites offer a multichannel fully populated board for a few bucks.

 

[tumbleweed]

I don't see any level shifting/voltage translation going on in the original circuit in post 1... just some misguided "interface protection" (whatever that means). We've never been told what that is trying to accomplish.

If it's meant for a mixed-voltage application it doesn't do that very well.

 

[schmitt trigger]

The OP has gone AWOL.

 

[Papabravo]

The OP has gone AWOL.

This is not uncommon when we fail to validate their cherished beliefs. You just cannot tell from an initial question which type of response you will get to reality.

 

[calltronics]

I agree, VERY odd to show capacitors on the I2C bus, good suggestion of possible parasitic capacitance.

Other than that, they would have to be very low values, and no point in them being there.

As for the zener?, that seems pointless as well - although I suppose it could be a vague effort to prevent EEPROM corruption? - if the OP really wants to add one?, then I would suggest 5.6V (assuming 5V Vcc).

However, as always with these posts - it's far too vague, and we need the schematic that it connects to.

took a long time to descover Vcc. It is 3.3V. This circuit is the battery block to connect/plug into a defibulator.

 

[danadak]

Spec on chip :

This spec seems to allow the internal protection diodes to conduct which is not advisable,
so I would clamp at Vin <= Vcc + .7. So worst case a zener value for that.

Protection considerations :

https://www.nxp.com/docs/en/application-note/AN10658.pdf

https://assets.nexperia.com/documen...ochure_ESD-Protection-Applications_022017.pdf

https://blog.mbedded.ninja/electronics/circuit-design/esd-protection/protecting-io-lines-from-esd/

Be aware that LV zeners can add a lot of C to the buss, compromising timing at the higher
speeds. So choose carefully.


Regards, Dana.