in the 'Table'
addwf PCL, f
add w to PCL and store in PCL, but what's the value of the w?
From your patterns, I think you can use rotate instead of calling the table.
*EDIT:But if you want to remain using the table you can do it this way:
Code:
movlw 11h ;start from 11h
movwf FSR
clrf temp
PUT movf temp, w
call Table
movwf INDF
incf FSR,F
incf temp, f
movf FSR,w
xorlw 16h ;check whether it has reached GP 16h
btfss STATUS,Z
goto PUT
goto EXIT
where temp is another assigned general purpose register to store the temporary patterns, and the table can be remained.
Hi thanks for the reply.I will try Bananasiong's coding & give a try.
And for Mike
I don't know whats the value of PCLATH.I have never used it I just use PCL all the time.
I have only five registers here to move the literals but if I need to move 50 literals to 50 GP registers do I need to make coding to PCLATH?
PCLATH contains the value that is copied into the high byte of the program counter when you write to PCL. I guess your table is at an address where the high byte is zero and so it works correctly. As your code gets bigger or you have more tables then some of the tables will be at different locations and will need PCLATH setting up. The high directive just gets the high byte of the address.
If I have 10 tables each 100 lines long & I place them in the upper part of the program.
But I’m calling the each table from the last location in the memory. It means if my PIC having 2K memory I’m calling from the 2000 line in the program.
So still I need PCLATH routines? My table’s not exceeding 8 bit it’s having 100 lines each.
If I have 10 tables each 100 lines long & I place them in the upper part of the program.
But I’m calling the each table from the last location in the memory. It means if my PIC having 2K memory I’m calling from the 2000 line in the program.
So still I need PCLATH routines? My table’s not exceeding 8 bit it’s having 100 lines each.
If you wanted 10 tables that each contain 100 items then you would have to organise them to fit into 256 byte blocks. The first would go at 0x0300 (block 3), the 2nd following it. The third wouldn't fit in block 3 as there are only 256-(2*100) = 56 locations left. Your third would therefore have to go at 0x0400 (using org 0x400). You carry on placing them in blocks until your last 2 tables go into block 7.
Now, because PCL is only 8 bits it can't access more than one block at a time and so in order to access table1 and 2 you would load PCLATH with 0x3 as they are located at 0x300 which is block 3. Likewise, for table 10 (in block 7) you would load PCLATH with 7.
You need to use PCLATH if you have any table that is outside the address range 0x000 to 0x00ff or it won't work.
There is some confusion here as to what is a page. The examples I gave above are using the term page to refer to a 256 byte block. Bananasiong is referring to a page as a 2K block. Microchip also refer to 2K pages and so I'll edit my above posts and change it to block.
You need to use PCLATH if you have any table that is outside the address range 0x000 to 0x00ff or it won't work.
There is some confusion here as to what is a page. The examples I gave above are using the term page to refer to a 256 byte block. Bananasiong is referring to a page as a 2K block. Microchip also refer to 2K pages and so I'll edit my above posts and change it to block.
Yes, PIC program memory is in 2K pages, PIC GPR's are in various banks, but the table 'limit' is in 256 byte blocks, due (as you said) to the 8 bit PCL register.