Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.
Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.
I have two modules(two different .v files) and would like to put them together to form one module which I can test. Does anyone know how I would do this? I'm pretty sure I need to instantiate my two lower modules into my top?
I took a stab at the top1.v to instantiate my decoder.v and waveform_gen.v. Xilinx ISE give me and error which isn't very helpfull.
"ERROR: Failed to create the command line for XST. One or more procedures reported errors."
Does anyone have an idea of where I'm making my error. It all is making sense to me. PLEASE HELP!!!
module top1(
port_sw, //input switch to select note
port_audl, //output tone to speaker
port_50clk, //input clk from 50MHz oscillator
port_reset //reset AUD_L to zero
);
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.