Interrupts latency

[atferrari]

Varying latency - Problem solved - 18F family

Hola Pommie + Mike,

Thanks to you both for the time spent. I found hard to understand the snippet in C.

Today, while on deck of a vessel I am currently attending, I found what was the solution.

Routine tested. It works with different values of HALF_t1 and HALF_T2. Here it is:

    ;009 ISR HIGH.ASM

;High priority interrupts service routine

;Interrupts desabled. STATUS, W & BSR saved automatically in the fast stack.
;------------------------------------------------------------------------------

;actual interrupt service code starts here

    RLNCF TMR1L,W           ;make W =PC offset =(value of TMR1L *2)
    ADDWF PCL,F             ;springboard ready
    NOP                     ;pontoons
    NOP                     ;for the
    NOP                     ;PC to
    NOP                     ;land
    NOP                     ;HERE (4)
    NOP                     ;or HERE (5)
    BTG PIN_CLK             ;toggle pin to materialize the clock
    
    ;let's load the new value of HALF_T to CCP1

    BTFSS LOAD_HALF_T1      ;=1, must load...
    BRA LOAD_HALF_T2_VALUES ;=0, load HALF_T2 values to CCP1
    
    MOVFF HALF_T1_H,CCPR1H  ;... HALF_T1 values
    MOVFF HALF_T1_L,CCPR1L  ;loaded to CCP1 registers.

HOUSEKEEPING_N_LEAVE
    BTG LOAD_HALF_T1        ;next time will load the other HALF_Tx value
    BCF PIR1,CCP1IF         ;=0 clears CCP1 compare match interrupt flag
    RETFIE FAST             

;STATUS, W & BSR retrieved from the fast stack. Back to main line code
;with interrupts enabled.

LOAD_HALF_T2_VALUES
    MOVFF HALF_T2_H,CCPR1H  ;HALF_T2 values
    MOVFF HALF_T2_L,CCPR1L  ;loaded to CCP1 registers.
    BRA HOUSEKEEPING_N_LEAVE

;actual interrupt service code ends here
;------------------------------------------------------------------------------

Neat and simple, isn't it?

One less...to complete my project.

Gracias

 

[atferrari]

Tweaking

After having considered my problem solved I understood the idea of adding to CCP1 registers!!!

I will rewrite my code including that with CCP1 again in charge of the toggling. Even simpler.

Good bye latency problem.