what is Qn ? and can you looping it ?Let T1 = 21,600 s min
T2= 20 s approx.
T1/T2 =1080 is close to 1024 or 2^10
Now check out the CD4060 and make a clock with Qn and Qn+10 match your time intervals.
View attachment 144583
Then buffer with a motor driver IC.
CD4xxx series can only drive 10K or so depending on Vdd voltage.
The 74HCT4060 can drive < 1kohm with ~ <50 Ohm driver @ Vdd=5.5V max.
https://www.digikey.ca/en/products/detail/texas-instruments/SN74HC4060N/386620
The 4060 from website who shall go nameless uses Q3 to Q13 which is wrong label but follows binary convention from Q0,Q1,Q2 etc.what is Qn ? and can you looping it ?
yeah but idk why in datasheet and here the equation is very different its like 1-3k ohm.f C3 was eg. 10uF and VR1 adjusted to give a ~ 5.3 second oscillator cycle, that should give a delay of around six hours before Q14 goes high and triggers the output.
Thank you very much for you all.Look at the TI.com version of the datasheet. Use a 10uF ceramic capacitor with a 91k ohm resistor for timing circuit Cx and Rx (see Fig 12 on the datasheet). This will give you 20-second pulses.
Use a 3-input AND gate and connect three inputs the CD4060's pins 15, 5 and 7 to get very close to 6 hours. The output of this AND gate to a MOSFET that drives a motor.
Thank you for your thoughts. I understand that it's very easy if we use microcontrollers like Arduino, etc., but I want to learn more basics. I want to understand each part of electronics separately. I know it may sound inefficient. T-TYou said you wanted minimum parts and accurate timing. If you are
new to programming then block language programming quite simple
and straight forward.
The ATTINY85 8 pin micro can do this in one part (plus bypass cap for it and
a regulator), code it with mBlock. mBlock takes your block configuration, shown
in right hand window, and converts that to Arduino code. Note in addition to the
part you of course need interface switch for motor power......
I think this example would be a good basis for design. Question, what causes loop
to stop, powering off whole system ?
View attachment 144593
You program the ATTINY85 with a Nano board configured as a programmer, thats
just a firmware you burn into Nano board. Nano board ~ $3. Note if you use Nano
Board as target its timing error < .1% as its has a xtal on board. If you use ATTINY85
as target its timing tolerance is ~ +/- 1% over T and V.
So if design is a one off, use the board, simple. Otherwise config board as programmer,
easy with Arduino IDE, videos on this, and use the ATTINY85.
Just a thought.....
Regards, Dana.
Remember this. All logic is basically clipped analog signals with RC and diode effects.Thank you for your thoughts. I understand that it's very easy if we use microcontrollers like Arduino, etc., but I want to learn more basics. I want to understand each part of electronics separately. I know it may sound inefficient. T-T
So where should i start first ?View attachment 144587 How did you compute T ? there are reasons at really slow clocks this is inaccurate.
It is like a flashback to 1976 with all these 4060 solutions, assumptions and things overlooked in accuracy.
Above is the original formula for one period, T of a clock cycle.
Using 10 uF electrolytic capacitors will experience reverse voltage (not accurate) since the average voltage differential is not zero. The clock R-RC junction average for Vcc=12 will be 24Vpp and will be offset from Vcc/2 will be the inversion of the input offset threshold roughly..
- the ϕO input with/without ESD protection, and output is shown below
Remember this. All logic is basically clipped analog signals with RC and diode effects.
What accuracy do you expect? It won't cycle at the same time each day. How will you know it is accurate?
How will you know other than to measure every 6 hrs? ...in case of unexpected disturbances.
Be sure to have fault detection in any design. e.g. timing checks like a slow pulse LED to check quickly.
What can cause disturbances in counting analog bi-exponential clipped waves to some threshold with a wide tolerance.
If it were not for the internal ESD protection diodes the input would be 2*Vcc= 24Vpp
Things to remember using the 74HC/CD/4060:
What errors did you measure, expect and use to calculate the period T?
- This CMOS IC has threshold tolerances like all CMOS and the RC timing here is not linear, rather it is the sum of two exponents clipped by ESD protection and switches with some variable offset to Vcc/2 +/- xx % at room temp then varies with temp.
When taken to extremes, electrolytic capacitors leak with an equivalent resistance of Vtest/Ileak=Rp and each e-cap family has different Rp*C=Tau time constants and varies with temperature and quality specs. A small e-cap might have Tau = 10 seconds. This can increase with bulk size of C and quality.
Electrolytics leak far more in reverse voltage and fortunately this is current limited otherwise it might explode. So beware using e-caps for timing errors in this circuit. Although I simulated an ideal cap.
These may also apply to some modern uC that use RC external slow clocks.
- See the actual input to the 10xR inverter input below assuming Vcc = 12V on CD4060. (Red plot=24Vpp)
- If you do not report what you used, calculated and measured, then we have no error to correct.
- Remember this is a ripple counter so latency and rise time with different thresholds may cause gating multiple outputs to have glitches during transitions as the latency accumulates after each ripple /2 count.
- If you use another matching 10*R input to Vcc the 2*Vcc_pk-pk would be reduced in half and no long have in the internal clipped ugly waveform ( that you cannot measure accurately because the low current (5mA) Schottky diodes must have 50 K current limiting R's in front to survive the kV ESD tests. Then there must be 2 stages to ensure no shootthru.
- View attachment 144596
Draw a timing diagram or State Diagram and work out the logicSo where should i start first ?
Hi Danadak, Where do you get Block Programming? Thanks.block language programming
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