Hi,
Recapping so we get the terminology right.
The BCD counter value is parallel loaded into the 'score' shift register.
On each clock pulse the 'score' reg is shifted right, on the same clock pulse the 'high score' shift register shifts right.
A bit by bit compare of the two shift registers is made.
If the 'score' reg is > 'high score' reg then load 'score'reg into 'high score' reg [ the 'score' reg is empty ]
Display 'score' and 'hiscore' on 7 seg LED's
Suggestion:
If not already so, make the 'counter' a two decade [8 bit] also the 'score' shift reg 8 bit and the 'high score' reg 8 bit.
When its time, parallel transfer the 'counter' 8 bits into the 'score' shift reg.
Apply 8 clock shift right pulses to both shift regs, do your bit compare at the output of both regs.
Loop back on both SR's, so you don't lose the values.
If the bit by bit compare indicates that 'score' > 'high score' then select the data source to the 'hiscore' SR as the ouput of the 'score' SR clock both SR's [8 clks], so the 'score' data is clocked into the 'hiscore' SR.
else
no change
endif
The SR's types marked with *** are the functions you need to emulate in your logic.
I know that you don't want to use a PIC, but it would be ideal for this application.
This way of doing it is just PT.
Refer to attached dwg.
Eric