Need help: Type II compensation/feedback

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Hi again,


Oh ok that would be great. I really like to see the whole system
as that takes away a lot of the guess work.
BTW, i had mentioned a 'buck' regulator when i should have been saying
a 'boost' regulator...my apologies for that misstatement. The compensation
networks however come from the general equations you gave so if
everything is right then it will be ok. Of course you still have to test
your device for no load, full load, low line, high line, etc., etc., to make
sure the compensation works exactly as is for all conditions of operation.
 

Hi MrAI,
This is the complete circuit diagram.
The 15V source is from the same 42V power supply (used a zener diode).
I have just tried the compensation network you suggested. Didn't work. The output voltage remains 44Vdc.
And then for some reason I don't understand, my gate driver (IR21844) heated up today. Now it is absorbing greater than normal currents. I will have to change this.
At this point, I think my output capacitor (1000uF) may be the cause of the compensation network not working. I know measured the capacitance with an LC meter at 10kHz. Read out 32uF. I don't know if the LC meter is giving the correct value...
 

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  • Experimental boost.pdf
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I do not normally work with boost converters - and I can't say that I have ever worked with one using voltage mode control. Having said that, there are a few things that I have noticed in your schematic that you posted (pdf file called "experimental boost").

First - the DC resistor gain created by the resistors R14 and R10 should not be included in the loop. This gain is DC only and cannot be included in your small signal analysis. Why? Because when you do the small signal analysis, you ground all your DC supplies/references. The reference on the non-inverting input to the error amplifier will then be grounded. The negative feedback on the error amplifier forces that voltage on the inverting input of the error amplifier - thus creating a virtual ground at the inverting input. This eliminates resistor R10 from the small signal analysis completely which means that the 1/74 gain that you are including in your loop is incorrect - there is no ac gain there. Once you remove that gain, you will need to recalculate your poles and zeroes in your Type II and try again.

Second - your schematic shows a Type III compensation network - not a Type II. Remove the RC (R2 and C11) across the feedback resistor for a Type II network.
 


Hi again,


Ok that's too bad...i was going by your equations though so i couldnt
say it would work perfectly as it was just a guess based on that.

Let me take a look at your whole schematic and see what i can spot.
I noticed that you used a 0.22uf cap instead of 0.15uf, but i dont
believe that will make much difference.

BTW, if that output cap 1000uf is really off by that much (32uf) that will
have a profound effect on the stability. That should be corrected first.
Try a different cap if nothing else.
 
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I now measured the capacitance with an LC meter at 10kHz. Read out 32uF. I don't know if the LC meter is giving the correct value...
Click to expand...

It is... that would be ESR & ESL at work. If you measure it at 50KHz it will be even less.


Some subber's on the MOSFET's would be wise...
 
Hello again,


Now that i think about it, if the unit is only putting out some 40 or
50 volts then something more fundamental must be wrong. Some
bad connection or something else not working right, because
at the very least the output should ramp up and either stabilize
or go unstable, but at least be some higher voltage. Even an
uncompensated unit should shoot the voltage way up, then way down,
then way up again, or at least some variance around the set point
that goes up high and down low and repeats.
You might test the basic operation by forcing a set point condition
and looking at the output. With fixed input and fixed load, the output
should stay relatively constant and it should be possible to set it to some
high value like 200 volts. This would be an unregulated unit but it should
work that way just fine.

At this point i would ask a bunch of questions, starting with how
much ESR does the inductor have, and do the switches turn on
fully? One of the reasons boost converters can sometimes not
achieve the full output is because of inductor ESR being too high.

Here is a simulation of a boost converter output and control voltage
using the compensation networks i suggested previously and those
values as well. As you can see, it ramps up to 189v and then
stabilizes. I took all the values from your schematic this time.
This kind of simulation takes into account the inductor ESR, the
capacitor ESR, the switches ESR, and the *exact* control law as it
even simulates the control ramp and associated circuitry...no shortcuts.
What it does not simulate are the tiny little things, like MOSFET turn on
time, rise time, turn off time, fall time. The control ramp time is 19us
with 1us dead time (20us total). Load is 500 ohms (you do have a
small load dont you?).

If there is something unusual about that controller chip i will have to
look at that tomorrow.
 

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  • Boost189v-01.gif
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some serious problems exist

Looking briefly at your circuit, I see a few problems.

Although you don't want to hear it now, someday you'll thank me. FORGET synchronous rectification! At 189V output, a diode drop matters very little. The main issue with traditional rectification is forward and reverse recovery loss. But at the super low switch freq of 50 kHz, the loss should be small.

Maybe I'm not seeing it right, but do you have the UC3823 PWM controller's current sense pin grounded?! I must be mistaken. UC3823 pin 9 goes to ground. If "Isns" is defeated, what controls the PWM duty cycle? The UC3823 is a peak *current* mode controller. You must have a signal present at the "Isns" pin for it to work. You labeled that pin as "Ilim". It is NOT merely a current limiting function. The sensed value of current literally controls PWM duty factor. This is all important. Right now, it cannot work at all. If one wishes to employ voltage mode control using the UC3823, a sawtooth ramp must be inputted to the Isns pin. The Tex Instr app notes detail this. The Isns pin should never be defeated. That is the most obvious problem.

Also, the IR21844 is a half bridge driver. As I said, sync rect is NOT what this app calls for, but we should note one thing. The IR21844 is not set up with sync rect in mind, but half bridge motor drive. Who recommended the IR21844? I don't understand why that chip would be recommended. Anyway, please use a conventional rectifier.

Also, the boost topology has no current limiting. A short on the output destroys the inductor, rectifier (sync MOSFET) and anything connected to the output. I use a FET front end, like a buck-boost topology for protection. Without a short on the output, the input high side FET stays fully on. When a short occurs, it is switched off. You need a SERIES switch to kill power when shorted. A boost has none.

I would say this. If I were in charge of this project, I see 40 to 80 hrs. of work ahead. At $100 US per hour, this is $4000 to $8000 US away from being designed and ready to go to artwork. Are you intimately familiar w/ current mode control, boost topology, MOSFET switching losses, conduction loss, diode forward & reverse recovery computations, feedback/stability, compensation, etc? If not, get help. I work full time for a company and am not legally permitted to moonlight.

I published 2 papers on current mode control, slope compensation, and current sensing. They might help. If you are up against the wall, you can email me, and I'll give what limited guidance I can w/o breaching my employer relation.

**broken link removed**

Best regards, and I hope you succeed. With 189V, PLEASE be careful!
 

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  • quiet_node_isense_cabraham_edn_2006.pdf
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Important Omission

I forgot to include an important component in the schematic I posted here. It is a NAND gate between the PWM controller and the gate driver. This is because the driver inverts the signal, so I used the NAND to invert it, so that the driver outputs the correct signal.
Thanks again
 
Hi again,


As i had shown with the waveforms above, the basic premise of the topology
had been proven, which means something more fundamental is wrong.
Since there are so many possibilities here, we can again only guess.

One problem that would cause what you are seeing is if the pwm signal is
inverted from what it should be. That is, the upper transistor is 'on' when
the lower transistor is supposed to be 'on' and vice versa. This would
have the effect of a very small coil duty cycle which would mean a low
output voltage, certainly not boosted.
To correct this, an inversion has to be inserted between the controller chip
and the driver chip (IR21844).
To check for this condition you could always look at some signals such as the
output of the error amp and the state of the two transistors.

Once the fundamental problem is fixed, the inverter should output some high
level voltage even though it may be unstable. After the compensation networks
are installed the stability should get much better.

Current limit is always a good idea, but until you get this basic operation going
you should just check to make sure it is biased so that it does not affect the
operation yet. Later you can deal with that once it is up and running normally.

Good luck with it
 

I eliminated the synchronous rectifier principle as some of you have suggested. I did this simply by eliminating the pulse to the sync rectifier. I also eliminated the NAND gate and the IR21844 gate driver (as recommended by Claude Abraham). Thus, I was firing only the main switch. The waveforms on the jpg attachment are schematics of the output signal of the UC3823n pwm controller. This signal is meant to fire the main switch through a 10 Ohm resistor. Now the first diagram is when the pwm controller is NOT connected. As expected the duty is max (About 85%). The second diagram is when I connected the controller to the mosfet. They controller is almost off and I have not even started supplying the boost with any voltage!! Thinking it was sourcing too much current, I replaced the 10 Ohm with a 110 Ohm and the waveform is like on the next image. I didn't even have the courage to start supplying the boost at 42V given these observations! I am using the IRFP360 mosfets.
I have also attached the datasheet of the UC3823n controller here. Please help me know if I have connected all the pins well for voltage mode control. Please, u can refer to an earlier post with my ISIS schematics (it's a pdf). For now, I am NOT implementing any current limiting. That's why I have grounded the Ilim pin. I just want to get something working first.
Thanks
Edwin
 

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  • pwm signals from pwm controller.JPG
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  • uc3823.pdf
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the grounded Isns pin IS the big problem



But with the Isns pin grounded, there is no servo control of the PWM. Once again, the pin on the UC3823 for current sensing is NOT MERELY a current LIMIT function. The regulation of the output voltage depends upon the sensed value of current. With Isns grounded, how can the PWM duty factor be controlled? How??

I can give you the name of a power electronics specialist company who can help you. If you have not "been there done that", too much time will pass until you learn how. With current mode control you MUST present a signal to the Isns pin. Even if you do not wish to limit current, the Isns pin cannot be defeated. Even if you wish to operate in straight voltage mode control, you cannot defeat the Isns pin.

Do not ground the Isns pin. If I may suggest something, maybe a voltage mode control IC would serve you better since current mode is unfamiliar to you. Is that something you would consider? As it stands right now, with Isns grounded, the Isns pin sees around 0 volts permanently. The error signal will always be greater than the Isns signal, so the PWM duty cycle will max out always. The dead time resistor determines the max duty factor. There is no regulation with the PWM constantly maxxed out. With a duty cycle limit of 85% max, a 42 V input results in a 280 V output!! At 90% duty factor, Vout is 420 V!

Tex Instr has a good app note on boost converters. SLVA57, 59, & 61 cover buck, boost, & buck-boost. It would help you. Also, I ran my spread sheet program I use for SMPS and found that sectioning the network using 6 parallel sections gives good results. I get an inductance of 23.5 uh per section, which is 5 4.7 uh parts in series. The "1.0 mh" on your schematic is what I assume as 1.0 millihenry, or 1000 uh. Is this correct? If so, that is way too large. At 80% duty factor, 50 kHz, the on time is 16 usec. The inductor ripple current is I = Vin*ton/L = (42V)*(16 usec)/(1.0 mh) = 0.672 A. This is way too small, and the inductor current is 110 A average. For a 1 section supply, the inductor ripple current should be 20 to 30% of the average current of 110 A. Hence the ripple should be 22 to 33 A. The optimum L value is around 22 to 33 uh. But the peak current is over 120 A! That is why I would use 6 parallel sections. I hope I've helped. BR.
 
Hi again,


Edwin:
Could you post a new schematic of your new connections? It's a little hard to
understand exactly what you have connected now, and a schematic is better
that trying to explain it in words. This will help a lot.
Also, could you take some scope shots of the ramp? I'd like to be able to discern
the polarity of the ramp and the associated circuitry so i can match my sim
model exactly. I need to see the ramp and the chip output pulse when it
is pulsing normally, however you want to get that to happen. This will help a lot too.
One other little point: You are saying that the duty cycle is limited to 85 percent,
and can go no higher? (this is actually good if so but i'd like to know)

Claude:
Are you saying that the current measurement is necessary in order for this
controller chip to function at all (ie state variable feedback)? It looks like
the typical controller chip to me with a current limit function but i could be
wrong. In those type of chips if you disable the current limit function
(however it can be done) the chip still works as a voltage regulator.
Are you saying this chip is different?
 
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I see your point. A few weeks ago, the schematic I saw posted for this converter used a UC2842 IC controller, a straight current mode device. I was thinking 2842, but now I see that it is a UC3823, which can operate in straight voltage mode. Was that a different thread? I had the 2842 on my mind. Anyway, if voltage mode control is being used, then it should work w/o current limit. My apologies. Just curious, was the UC2842 used at any point for this converter? I seem to remember it.

Still, the inductor, at 1.0 millihenry is way too big. The rhpz computes at 55 Hz! This will be a very slow converter. The type 2 compensating zero is at 16 Hz! And another point to ponder. If this IC is using voltage mode, then type 2 comp is inadequate, type 3 should be used. Type 3 uses 2 zeroes as opposed to just 1 zero for type 2. The extra zero is needed because VMC transfer function has a double pole at the LC resonant freq. A CMC transfer function has just 1 low freq pole, plus 2 more at half the switch freq. I'll add more later. Thanks.
 
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MrAl said:
Hi again,


One other little point: You are saying that the duty cycle is limited to 85 percent,
and can go no higher? (this is actually good if so but i'd like to know)
Click to expand...

Yes. The soft start pin does the duty cycle clamping.
It is good, but 85% is still potentially destructive...
Pictures in a moment...
Regards
 

Here is the updated schematic.
As for the pictures, I will post them as soon as possible.
Thx
 

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  • Experimental boost.pdf
    42.7 KB · Views: 286
Hello again,


Oh ok so you have the controller chip connected directly to the lower mosfet now.
That's a good idea for now.

I'd still like to see the ramp pictures, but for now from what you say it sounds
like there is too much feedback which might mean one of the resistors like
R14 or R10 is not the right value. If R14 were much smaller than the schematic
says or R10 was much bigger this would happen too, so it may be a good idea
to check those two values very carefully. A resistance measurement would be
a good idea too just to make sure.
If the resistance does check out ok, then perhaps you can try to find a resistance
that when inserted between R14 and the output that allows the converter to start
to regulate at least to some degree, even if unstable ac wise. Statically the chip
looks like it is working but this would give us a rough look at the dynamics too.
Another idea would be to connect a pot to the inv terminal of the op amp and
see if when you adjust its arm above and below around 2.55v that the output
first goes to full output and then to low output. This would also be a quick test
of the dynamics of the chip. One side of the pot would go to +5v (or some regulated
voltage like that) and the other side to ground, and the arm to the inv terminal
of the error op amp. The feedback itself would be disconnected. With the pot you
could verify that turning the inv voltage up above 2.55v causes the output to
die down to a low value while turning it below 2.55v causes the output to rise
to some high level (watch out though, dont apply too much input voltage).
This would test the polarity of the ramp and feedback and drive to make sure
it's all connected right.

Another idea of course is to lower R14 to a value that would cause say 40v output,
then apply a 10v input and try to get that working first. Once working, move back
to trying to get 189v output with the right values. The pot test should pass first
though or this test wont work either.

BTW, i think someone mentioned this already but you know those transistors are
only rated for around 23 amps right? Yes the pulsed rating is higher, but still
not high enough for a 4kW boost converter with 1:4 boost. With 22 amps out
there will be something like 100 amps through that transistor for about 77 percent
of the time, which is way too high and will burn the device up.
For testing though, staying under around 4 amps would probably be ok.
Just thought i would mention this.
 
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Hello again,


Instead of ramp pictures if they seem to be hard to obtain, a hand drawing
would be ok too, as long as they are from the oscilloscope and not a
theoretical drawing.
 
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