I am new to microcontrollers and have read the stickey FAQ.
I tried to write a programme for 18F452. The programme is supposed to generate a pulse train of 30% dutycycle.
I tried to simulate it in MP Lab IDE.
Code:
org 0000
movlw 0x03 ;Set PORT A to Digital
movwf 0x0fc1
bcf 0x0f92,0 ;Set bit0 of PORT A as output
loop:
movlw 0x03 ;Output a 30% Duty cycle pulse train.
bsf 0x0f80,0
call delay
bcf 0x0f80,0
movlw 0x07
call delay
goto loop
delay:
dcfsnz 0x00fe8 ;decrement W
return
bra delay
END
When I tried to observer the RA0 pin in the logic analyser applet, all I got was a straight line.
So I have to define constants mysef? :cry:
I thought the IDE would understand it.... But it did not...
SO I had to write it all as addresses....
Code:
org 0000
movlw 0x03 ;Set PORT A to Digital
movwf 0x0fc1 ;ADCON1
bcf 0x0f92,0 ;Set bit0 of PORT A as output (TRISA)
loop:
movlw 0x03 ;Output a 30% Duty cycle pulse train.
bsf 0x0f80,0 ;PORT A but LATA is set
call delay
bcf 0x0f80,0
movlw 0x07
call delay
goto loop
delay:
dcfsnz 0x00fe8 ;decrement W
return
bra delay
END
org 0000
#include P18F452.inc
movlw 0x03 ;Set PORT A to Digital
movwf ADCON1
bcf TRISA,0 ;Set bit0 of PORT A as output
loop:
movlw 0x03 ;Output a 30% Duty cycle pulse train.
bsf LATA,0
call delay
bcf LATA,0
movlw 0x07
call delay
goto loop
delay:
dcfsnz WREG ;decrement W
return
bra delay
END
Okay I tried to do it...And it builds and runs properly...
Except that I do not see any waveform on the Logic Analyzer when I try to observe AN0 or RA0
i donno anything abt the 18F..still
does the simulation succeded ?
what is ur operating freq.?
u said a straight line .is it high or low..?
have u checked the chances for the read-modify-write problem.?
I had used bcf PORT A,0 before changing it to bcf LATA,0
And it made no difference in the simulations... Both the commands changed the LATA register... It looks like the PORT A is the input Register and LATA the output.