What confused me is that you drew the FET upside-down from how it's usually shown on a schematic (drain on top). So you do have a negative voltage on the drain as needed. Drawing circuits in a unconventional manner, makes it more difficult to analyze. That may be why you made the drain resistor smaller than the source resistor, which is opposite of the typical circuit.
You equation is correct. But it means Vs must be less (more negative) the Vg.
You equation is correct. But it means Vs must be less (more negative) the Vg.