Boncuk said:Hi petrv,
thank you for the information. However it is getting confusing more and more.
I attached a fraction of the schematic with all pins labelled. The output pins of the AT90S8515 are all used for the 8-digit LED display.
If you have the time would you kindly make a "translation" from Lattice to Xilinx pin numbers?
Regards
Hans
As petrv mentioned....the pins a cpld use is entirely down to the user. If you have a design that uses only 5 I/O's....then you can use any I/O for any of them (except obviously the JTAG and power/gnd pins). This is indeed 'confusing' if you don't have the source code. As a jeduc/hex file for the CPLD will already have this information. In which case you'll have to use the original device and it can then be used exactly as in the schematic (its I/O's are already assigned).
A translation from lattice to xilinx part numbers is sort of down to you
If you have the VHDL/verilog/schematic source, then as petrv suggested, xilinx ISE webpack will happily take this, then you map the I/O's (in the design each input/output wil have a name, just tell the software what names go to what pins). Set the device, and program. I will pm you my email address, and if you want, email me the source/url or the project.
Right now I see we've got several problems that need to be solved:
1. Decide whether you can get the lattice CPLD in question (2032), or whether it is easier for you to aquire a xilinx equivilent (part numbers already mentioned).
2. IF you have the code/schematic (for programming the CPLD) then you can use either lattice OR xilinx parts. If you only have tghe jedec file, you're pretty much stuck with having to use the Lattice 2032.
2a. As another option (not an easy one). If you know exactly what the CPLD is supposed to do, then I suppose I could attempt to write some VHDL or create a CPLD schematic and send it to you, so you can use it for XIlinx OR Lattice parts.
3. Download cable. As you seem happy to get a PCI parallel port card, then its just a case of getting decent schematics for the cable. Again, xilinx or Lattice? Xilinx have some easy-to-read schems, but as you rightly pointed out, the schem for the lattice cable is a bit of bugger. I shall reverse engineer my DIY download cable (works with every lattice part I got) and provide a Eagle schem, parts list, and if you REALLY want, a stripboard layout. Or even if you are willing to make a PCB for it (works jsut fine on stripboard) I may even be nice enough to design a custom PCB
So, there are all the options. It is indeed confusing, took me ages to get the hang of using CPLD's but once you get it, its pretty cool, and extremely handy.
As I said, I shall send you a personal message in this board with my email address. Send me all the info you have on the project. If its on a webpage, then a url would be fine...if you have source codes, send them. Obviously I won't really need the microcontroller code, its all about that Lattice thing.
Good luck, we'll get there eventually mate.
Blueteeth