Preamble detection, how does it happen ?

[kellogs]

Consider two Manchester bits "00" = "0101" symbols as the preamble. Binary FSK modulation. When there is no signal (i.e. only noise on the channel) I envision the average sub-GHz receiver to immediately detect such preamble, because white noise will only yield 0/1 sequences of various lengths.

But this does not happen, no receiver detects such preambles from white noise. So how do they do it ?

 

[rjenkinsgb]

The preamble exists to allow the recovery clock to synchronise with the data. That is all it is for.

In eg. 10Mbit Ethernet, the preamble is seven bytes long, alternating 1 & 0 bits. That allows the PLL to get in lock, for the actual data that follows

There must then be a start of frame sync pattern to mark the start of the actual data, as the PLL would not get in lock until some random way through the preamble.

At the end of a packet or data frame there will be a CRC of the data content. If that is not valid for the overall packet in the decoder, the data is discarded. Likewise if the structure of the data content is invalid.

Example:

ETHERNET FRAME FORMAT

(A receiver also likely uses squelch or RSSI and ignores anything with a carrier strength below a certain level).

 

[Papabravo]

A sequence of bits can be shifted into a register one bit at a time up to some maximum length. A bit string comparator can monitor the bits in the shift register and indicate if the pattern matches the desired preamble. This works well for irregular preambles. You can also use a state machine, either Mealy or Moore, to recognize strings of bits described by a regular expression. This works well for very long preambles with a regular pattern.

In some coding schemes you can also recognize code violations as part of a preamble. This is a really cool thing.

 

[Tony Stewart]

The simplest non-PLL clock recovery for a Manchester code of 0.5T and 1T is to use an XOR edge detector to trigger a 0.75T one-shot. This synchronizes immediately while the PLL that follows that trailing edge of 0.75T reduces the clock jitter. to then sample the data.

For low SNR situations dual integrate and dump methods are used to integrate the pattern of the data relative to the synchronized clock.

If you are talking about async. burst data with a 2 bit preamble, then no PLL is used. Just the circuit I described. However if the clock frequency error is very low, a digital 1-shot using a high clock and divide by N with a reset may be more accurate than an RC one shot with a constant current source.

So define your pattern with clock sync, data sync, word sync, frame sync and include parity or Hamming code or CRC or ECC. Then define worst case SNR and expected BER.

 

[Beau Schwabe]

I implemented this years ago in a PIC16F54 ... Page 6 section 4.1

https://ww1.microchip.com/downloads/en/AppNotes/Atmel-9164-Manchester-Coding-Basics_Application-Note.pdf

Once the bit period and sync are detected, just read the data at 1/4th delay of the period.


Note:
Something to know about this project.
This project was an exploit to demonstrate the vulnerability of RFID back in 2014.
It was presented at RMISC (Rocky Mountain Information Security Conference) where a valid RFID read was obtained from a record breaking 25 feet away from the "Modulator". The Modulator is simply the door reader. This presentaion led to another presentation at BSides Security conference in Las Vegas that same year.

The "exploit"? - Well, some door readers are not properly shielded, so when you place your RFID tag on the door reader, the door reader becomes a transmitter. So much so that you can "listen" with a properly tuned radio to both sides of the RFID negotiatin (such as the case with some hotel keys). In my case up to 25 feet away from the door reader.

The attached images reference 125kHz RFID tags


PIC16F54 Assembly CODE:

General code operation... PROGRAM OPTION1
1) Data enters Din
2) If a valid TAG is detected then an audible BEEP is sent to the Speaker
3) Sout sends the decoded TAG data @ 19.2kbaud on every valid tag

General code operation... PROGRAM OPTION2
1) PIC functions as a 125kHz source oscillator


OPTION1/OPTION2:
There is a check at the beginning of the code that is "PCB aware" and switches modes for another operation.
I did this because I had two different PCB boards using the same Micro, and I didn't want to manage two different codes on two different PIC's... This way I have only ONE IC , and one code that works on two different PCB's.

; CONFIG
; __config 0xFFF2
 __CONFIG _OSC_HS & _WDT_OFF & _CP_ON

#include "p16f54.inc"
 
    org        0

;Header_Info:
;============================================
    movlw   .32      ;
    movlw   .32      ;
    movlw   .32      ;
    movlw   .32      ;
    movlw   .82      ;R
    movlw   .70      ;F
    movlw   .73      ;I
    movlw   .68      ;D
    movlw   .32      ;
    movlw   .32      ;
    movlw   .32      ;
    movlw   .32      ;
    movlw   .83      ;S
    movlw   .110     ;n
    movlw   .105     ;i
    movlw   .102     ;f
    movlw   .102     ;f
    movlw   .101     ;e
    movlw   .114     ;r
    movlw   .32      ;
    movlw   .86      ;V
    movlw   .69      ;E
    movlw   .71      ;G
    movlw   .65      ;A
    movlw   .83      ;S
    movlw   .32      ;
    movlw   .32      ;
    movlw   .32      ;
    movlw   .66      ;B
    movlw   .83      ;S
    movlw   .105     ;i
    movlw   .100     ;d
    movlw   .101     ;e
    movlw   .115     ;s
    movlw   .32      ;
    movlw   .32      ;
    movlw   .50      ;2
    movlw   .48      ;0
    movlw   .49      ;1
    movlw   .52      ;4
    movlw   .32      ;
    movlw   .76      ;L
    movlw   .86      ;V
    movlw   .32      ;
    movlw   .75      ;K
    movlw   .105     ;i
    movlw   .116     ;t
    movlw   .45      ;-
    movlw   .83      ;S
    movlw   .116     ;t
    movlw   .97      ;a
    movlw   .114     ;r
    movlw   .116     ;t
    movlw   .46      ;.
    movlw   .99      ;c
    movlw   .111     ;o
    movlw   .109     ;m
    movlw   .32      ;.
    movlw   .32      ;.
    movlw   .32      ;.



;-----------------------------------------------------------------------------------------------

Initialize_Variables:
;============================================
Temp1_H        equ    h'07'
Temp1_L        equ    h'08' 
Temp2        equ    h'09' 
Counter        equ    h'0A'
Acc        equ    h'0B'
SData        equ    h'0C'
Bit        equ    h'0D'
Sync        equ    h'0E' 
ColumnParity    equ    h'0F'
ParityBit    equ    h'10'
 
_Data        equ    h'11'
Data0        equ    h'12' 
Data1        equ    h'13'
Data2        equ    h'14'
Data3        equ    h'15' 
Data4        equ    h'16'
Data5        equ    h'17'
Data6        equ    h'18' 
Data7        equ    h'19'
  
DelayLoop    equ    h'1A'
DelayLoop2    equ    h'1B'


;###############################################################################
TestPCB:
;###############################################################################
    movlw   b'11111110'        ;Set PortA.0 to an OUTPUT
    TRIS    PORTA
    movlw   b'00000001'        ;Set PortA.0 to a logic HIGH ; Charge Capacitor
    movwf   PORTA
 
    movlw   d'255'
    movwf   DelayLoop
Dly1:
    decfsz  DelayLoop,F
    goto    Dly1
 
    movlw   b'11111111'        ;Set PortA.0 to an INPUT
    TRIS    PORTA
 
    clrf    Sync
 
;###############################################################################
Discharge:
;###############################################################################
    incf    Sync,F
    incf    Sync,W
    btfsc   STATUS, Z
    goto    OSC125KHZ_Initialize
    btfsc   PORTA,0
    goto    Discharge
    goto    Initialize_IOs
OSC125KHZ_Initialize:
    movlw   b'10101111'        ;Set PortB.4 and PortB.6 to OUTPUTS
    TRIS    PORTB
    goto    OSC125KHz
 
;###############################################################################
Initialize_IOs:
;###############################################################################

;Port A
;============================================
    movlw   b'11111111'        ;Set PortA DIR ; 0 - OUTPUT 1 - INPUT
    TRIS    PORTA
    movlw   b'00000000'        ;Set PortA OUT ; 0 - LOW 1 - HIGH
    movwf   PORTA

;Port B
;============================================
    movlw   b'00000000'        ;Set PortB DIR ; 0 - OUTPUT 1 - INPUT
    TRIS    PORTB
    movlw   b'00000000'        ;Set PortB OUT ; 0 - LOW 1 - HIGH
    movwf   PORTB
 
    goto    START
    ;goto    BEEP_DEBUG

;###############################################################################
OSC125KHz:
;###############################################################################
    movlw   d'5'
    movwf   DelayLoop
Dly2:
    decfsz  DelayLoop,F
    goto    Dly2

    movlw   b'01000000'
    movwf   PORTB

    nop
    nop

    movlw   d'5'
    movwf   DelayLoop
Dly3:
    decfsz  DelayLoop,F
    goto    Dly3

    movlw   b'00010000'
    movwf   PORTB
  
    goto OSC125KHz

;============================================


;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/
;
; Define ALL subroutines at the beginning of the program
;
;\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\

;###############################################################################
BAUD_Delay:
;###############################################################################
        movlw   .82            ;Hard Coded for 2400 baud      3:172
        movwf   Temp1_L        ;               4800 baud      2:83
        movlw   .1             ;               9600 baud      1:168
        movwf   Temp1_H        ;              19200 baud      1:82
RptLoop:
        decfsz  Temp1_L,F
        goto    RptLoop
        decfsz  Temp1_H,F
        goto    RptLoop
        retlw   .0

;############################################################################### 
Send_BYTE:                                              ;Data Sent on PortB.7
;###############################################################################
;Variables:
;
;          SData                 Sent SData Byte
;
; Note PortB.7 is set for inverted data output
;============================================
        bcf     PORTB,7         ;START Bit ; HIGH
        call    BAUD_Delay      ;Bit Delay for BAUD
  
        movlw   .8
        movwf   Counter
SendBIT:                        ;Send Bits 0 to 7 ; RS232 is LSB first           
        btfss   SData,0         ;Read SData bit 0
        bcf     PORTB,7         ;Clear bit on Port if SData is LOW
        btfsc   SData,0         ;Read SData bit 0
        bsf     PORTB,7         ;Set bit on Port if SData is HIGH
        rrf     SData,F         ;Shift SData right into Carry
        call    BAUD_Delay      ;Bit Delay for BAUD

        decfsz  Counter,F       ;Check for next Bit
        goto    SendBIT

        bsf     PORTB,7         ;STOP Bit ; LOW       
        call    BAUD_Delay      ;Bit Delay for BAUD           
        retlw   .0              ;Return from call

ParityNibble:
        clrf    Bit
    movf    Temp1_L,W
    andlw    b'00011111'
    movwf    _Data
 
        bcf     STATUS,C        ;Clear the C bit
        rrf     _Data,F                                 ;_Data = Hex Nibble
        rlf     Bit,F                                   ;Bit = Parity Bit         

    movf    _Data,W
    movwf    Temp1_L
        movf    Temp1_L,F
        xorwf   ColumnParity,F

    movlw    .4
    movwf    DelayLoop
Dly4:
    rrf    _Data,F
    rlf    Bit,F
    call    ParityCheck
    movwf    Bit
    decfsz  DelayLoop,F
    goto    Dly4

    decf    Bit,W                    ;ERROR Detected
    btfsc    STATUS, Z
    goto    START
 
        retlw   .0
 
;############################################################################### 
ParityCheck:
;###############################################################################
        movf    Bit, W
        addwf   PCL, F
  
        retlw   .0;00
        retlw   .1;01
        retlw   .1;10
        retlw   .0;11
 
;###############################################################################
Beep:
;###############################################################################
    movlw    .255
    movwf    DelayLoop
Dly5:
    movlw   B'11111100'             ;Set PortA DIR ; 0 - OUTPUT 1 - INPUT
    TRIS    PORTA

    movlw    .255
    movwf    DelayLoop2
Dly5B:
    decfsz  DelayLoop2,F
    goto    Dly5B
 
    movf    Temp1_L,W
    movwf   DelayLoop2
    btfsc   STATUS,Z
        goto    Dly5C_End
Dly5C:
    decfsz  DelayLoop2,F
    goto    Dly5C
Dly5C_End:
 
    movlw   B'11111111'             ;Set PortA DIR ; 0 - OUTPUT 1 - INPUT
    TRIS    PORTA
 
    movlw    .255
    movwf    DelayLoop2
Dly5D:
    decfsz  DelayLoop2,F
    goto    Dly5D
 
    movf    Temp1_L,W
    movwf   DelayLoop2
    btfsc   STATUS,Z
        goto    Dly5E_End
Dly5E:
    decfsz  DelayLoop2,F
    goto    Dly5E
Dly5E_End:
 
    decfsz  DelayLoop,F
    goto    Dly5
 
    retlw    .0
 
 
;###############################################################################
START:
;###############################################################################
 
    movlw    d'1'
    movwf    Data1
    clrf    Data2
    clrf    Data3
    clrf    Data4
    clrf    Data5
    clrf    Data6
    clrf    Data7
 
        ;goto Debug

;============================================
;===========================================

        clrf    Acc
;--------------------------------------------------------------------------------------
Loop2:                                                  ;Loop; hold while LOW
    clrf    Bit
    btfsc    PORTA,1
    incf    Bit,F

    incf    Acc,F            ;Acc = Acc + 1          Z flag is active

    movf    Bit,F            ;if Bit = 0 then goto Loop2     
    btfsc    STATUS, Z
    goto    Loop2
;--------------------------------------------------------------------------------------
Loop3:                                                  ;Loop: hold while HIGH
    clrf    Bit                ;Bit = PortA.1
    btfsc    PORTA,1
    incf    Bit,F

    decf    Bit,W                ;if Bit = 1 then goto Loop3
    btfsc    STATUS, Z
    goto    Loop3
;--------------------------------------------------------------------------------------
    movlw    .100                ;if Acc < 100 then goto Start             
    subwf    Acc,W                ;minimize false triggering due to noise
    btfss    STATUS, C            ;Acc typically reads 80 (short) and 160 (long)
    goto    START                ;We want to sync on a long pulse
                      

;-------------------------------------------------------------------------------------- 
    movlw    .7                ;Look for RFID SYNC ; 9 successive HIGHs
    movwf    DelayLoop
Dly6:
    clrf    Sync
SYNC1:
    movlw    .50                ;Delay to prevent increment overflow in Sync
    movwf    DelayLoop2
Dly6B:
    decfsz  DelayLoop2,F
    goto    Dly6B
 
    incf    Sync,F                ;wait until state change does agree with bit
    clrf    Temp1_L
    btfsc    PORTA,1
    incf    Temp1_L,F
 
    movf    Bit,W                ;if Temp1 <> Bit then goto Sync1         
    subwf    Temp1_L,W
    btfss    STATUS, Z
    goto    SYNC1
 
    movlw    .13                ;If Sync < 13 then SHORT PULSE DETECTED
    subwf    Sync,W         
    btfsc    STATUS, C
    goto    START                ;ERROR Detected
 
    clrf    Sync
SYNC2:
 
    movlw    .50                ;Delay to prevent increment overflow in Sync
    movwf    DelayLoop2
Dly6C:
    decfsz  DelayLoop2,F
    goto    Dly6C
 
    incf    Sync,F                ;wait until state change does not agree with bit
 
    clrf    Temp1_L
    btfsc    PORTA,1
    incf    Temp1_L,F

    movf    Bit,W                ;if Temp1 = Bit then goto Sync2
    subwf    Temp1_L,W
    btfsc    STATUS, Z
    goto    SYNC2
 
    movlw    .13                ;If Sync <13 then goto Sync3
    subwf    Sync,W
    btfss    STATUS, C
    goto    SYNC3
    goto    START                ;ERROR Detected
 
SYNC3:

    decfsz  DelayLoop,F
    goto    Dly6

;        |<-------------- SYNC --------------->|<------- We are here
;           _   _   _   _   _   _   _   _   _   ___
;         _| |_| |_| |_| |_| |_| |_| |_| |_| |_|   |....

;###############################################################################
BITdecodeSTART:
;###############################################################################
    movlw   d'55'
    movwf   DelayLoop
Dly7:
    decfsz  DelayLoop,F
    goto    Dly7

        clrf    Sync
StateB:
    movlw   d'50'                    ;Delay to prevent increment overflow in Sync
    movwf   DelayLoop
Dly8:
    decfsz  DelayLoop,F
    goto    Dly8
 
 
        incf    Sync,F                                     ;wait until state change does agree with bit
 
    clrf    Temp1_L             
    btfsc    PORTA,1
    incf    Temp1_L,F
 
    movf    Bit,W                        ;if Temp1 = Bit then goto StateBjump
        subwf    Temp1_L,W
    btfss    STATUS, Z
    goto    StateB
 
StateBjump: 

;        |<-------------- SYNC --------------->|   |<------- We are here
;           _   _   _   _   _   _   _   _   _   ___
;         _| |_| |_| |_| |_| |_| |_| |_| |_| |_|   |....

;--------------------------------------------------------------------------------------
        If Sync < 13 then                               'SHORT PULSE DETECTED
SHORTpulse: 
           clrf Sync
StateC:
           repeat 50                                    'Delay to prevent increment overflow in Sync                               
           end repeat
           incf Sync,F                                  'wait until state change does not agree with bit
           Temp1 = PortA.1
           if Temp1 = Bit then goto StateC
'--------------------------------------------------------------------------------------     
           If Sync <13 then goto StateCjump1
           goto Start                                   'ERROR Detected
StateCjump1:
        else
LONGpulse:
            movlw 1                                     'Invert Bit
            xorwf Bit,F                           
        end if
'--------------------------------------------------------------------------------------
BIG56bitShift:

                                     ''BIG 56-bit Shift register
          bcf     STATUS,C        'Clear the C bit
          rlf     Data1,F         'Rotate Data1 left through C bit
          rlf     Data2,F
          rlf     Data3,F
          rlf     Data4,F
          rlf     Data5,F
          rlf     Data6,F
          rlf     Data7,F
          movf    Bit,W
          xorlw   1             'invert data
          iorwf   Data1,F
      
 
        end repeat
        'Goto Debug

        'Data7    Data6    Data5    Data4    Data3    Data2    Data1
        '00000000-00000000-00000000-00000000-00000000-00000000-000xxxxx
        clrf    Bit
        ColumnParity = Data1 and B'00011111'
        bcf     STATUS,C        'Clear the C bit
        rrf     ColumnParity,F                          'ColumnParity = Hex Nibble
        rlf     Bit,F                                   'Bit = Parity Bit
        if Bit = 1 then goto Start                      'ERROR Detected

        'Data7    Data6    Data5    Data4    Data3    Data2    Data1
        '00000000-00000000-00000000-00000000-00000000-000000xx-xxx00000
        Temp1   = Data1
        Temp2   = Data2
        repeat 5
          rrf     Temp2,F
          rrf     Temp1,F
        end repeat
        call      ParityNibble
        Data1 = Temp1
  
        'Data7    Data6    Data5    Data4    Data3    Data2    Data1
        '00000000-00000000-00000000-00000000-00000000-0xxxxx00-00000000
        Temp1   = Data2
        repeat 2
          rrf     Temp1,F
        end repeat
        call      ParityNibble
  
        swapf   Temp1,W
        iorwf   Data1,F

        'Data7    Data6    Data5    Data4    Data3    Data2    Data1
        '00000000-00000000-00000000-00000000-0000xxxx-x0000000-00000000
        Temp2   = Data2
        Temp1   = Data3
        rlf     Temp2,F
        rlf     Temp1,F 
        call      ParityNibble
        Data2 = Temp1

        'Data7    Data6    Data5    Data4    Data3    Data2    Data1
        '00000000-00000000-00000000-0000000x-xxxx0000-00000000-00000000 
        Temp1   = Data3
        Temp2   = Data4
        repeat 4
          rrf     Temp2,F
          rrf     Temp1,F
        end repeat 
        call      ParityNibble
        swapf   Temp1,W
        iorwf   Data2,F

        'Data7    Data6    Data5    Data4    Data3    Data2    Data1
        '00000000-00000000-00000000-00xxxxx0-00000000-00000000-00000000
        Temp1   = Data4
        rrf     Temp1,F
        call      ParityNibble 
        Data3 = Temp1

        'Data7    Data6    Data5    Data4    Data3    Data2    Data1
        '00000000-00000000-00000xxx-xx000000-00000000-00000000-00000000 
        Temp1   = Data5
        Temp2   = Data4
        repeat 2
          rlf     Temp2,F
          rlf     Temp1,F
        end repeat 
        call      ParityNibble 
        swapf   Temp1,W
        iorwf   Data3,F

        'Data7    Data6    Data5    Data4    Data3    Data2    Data1
        '00000000-00000000-xxxxx000-00000000-00000000-00000000-00000000
        Temp1   = Data5
        repeat 3
          rrf     Temp1,F
        end repeat
        call      ParityNibble
        Data4 = Temp1

        'Data7    Data6    Data5    Data4    Data3    Data2    Data1
        '00000000-000xxxxx-00000000-00000000-00000000-00000000-00000000
        Temp1   = Data6
        call      ParityNibble
        swapf   Temp1,W
        iorwf   Data4,F

        'Data7    Data6    Data5    Data4    Data3    Data2    Data1
        '000000xx-xxx00000-00000000-00000000-00000000-00000000-00000000
        Temp1   = Data6
        Temp2   = Data7
        repeat 5
          rrf     Temp2,F
          rrf     Temp1,F
        end repeat
        call      ParityNibble
        Data5 = Temp1

        'Data7    Data6    Data5    Data4    Data3    Data2    Data1
        '0xxxxx00-00000000-00000000-00000000-00000000-00000000-00000000
        Temp1   = Data7
        repeat 2
          rrf     Temp1,F
        end repeat
        call      ParityNibble
        swapf   Temp1,W
        iorwf   Data5,F 

        if ColumnParity <> 0 then goto Start                      'ERROR Detected
    
BEEP_DEBUG:
        Temp1 = 19
        call    Beep
                                              
DEBUG:
        movlw   255             'Send SYNC byte
        movwf   SData           'Data to send
        call    Send_BYTE 

        movlw   255             'Send SYNC byte
        movwf   SData           'Data to send
        call    Send_BYTE
  
        movf    Data5,W
        movwf   SData           'Data to send
        call    Send_BYTE

        movf    Data4,W
        movwf   SData           'Data to send
        call    Send_BYTE

        movf    Data3,W
        movwf   SData           'Data to send
        call    Send_BYTE

        movf    Data2,W
        movwf   SData           'Data to send
        call    Send_BYTE

        movf    Data1,W
        movwf   SData           'Data to send
        call    Send_BYTE

'-------------------------------------------------------------------------------------------
  
        goto    START

 

[Nigel Goodwin]

I implemented this years ago in a PIC16F54 ... Page 6 section 4.1

At least it was an F54 and not a C54

 

[Beau Schwabe]

At least it was an F54 and not a C54

... And I've had plenty of those ... even UV erasable versions of the 54.

Here is to bit banging Assembly code the hard way back in the day. The 54' is missing a few KEY instructions that every other micro has, which makes it even more challenging. I think "addlw" and "sublw"... it's been awhile, I forget now. We don't need no stinkin libraries.

 

[Tony Stewart]

I did my Bi-Phase 1st transceivers in SSI logic during the era of the 6800 back when uC's were just a twinkle in a nerd’s eye and the slide rule was fastest portable computer in town and built into a SCADA network which would have sounded sick, like the future SCSI. (Although my mentor Bill Whitehead was already playing 3D chess on his benchtop Nova)

Naturally 3/4 and 1/4 clk delay positions are viable sampling positions with a 3/4T one-shot clock sync and that code depends on your options for Bi-Phase {mark, space or inverse}.

 

[Nigel Goodwin]

... And I've had plenty of those ... even UV erasable versions of the 54.

Here is to bit banging Assembly code the hard way back in the day. The 54' is missing a few KEY instructions that every other micro has, which makes it even more challenging. I think "addlw" and "sublw"... it's been awhile, I forget now. We don't need no stinkin libraries.

Yes, they were very low spec. - I also remember the missing instructions, but also can't remember what they were

Basically I originally concentrated on the original EEPROM chip, the 16C84, and it's later replacement the 16F84 (still EEPROM, despite the F).

The only 'real' C series device I used was the old 12C508, which at the time was the only 8 pin device available, there were no PIC 8 pin EEPROM devices. I suspect the 12C508 might have had the same missing instructions?.

 

[Tony Stewart]

"But this does not happen, no receiver detects such preambles from white noise. So how do they do it ?"

There is likely a finite probability of noise having sequence that matches the preamble and frame sync perhaps just a tad more than detecting an alien message on SETI. Any more questions?