can anyone help with a programmable array logic diagram. there are 6 inputs, A notA, B notB, C notC. these are inputting 4 AND gates, 4 outputs from these are inputting an OR gate. decoding logic is to be used to generate a logic 1 when counter output indicates the number 2 or 3. I have to complete diagram to implement the required decoding logic.
The boolean expression would be notA.B.notC + notA.B.C so if i implement this into the 4 and gates can the boolean expression be repeated? therefore cancelling out and leaving with the original expression as each and gate has to have an input.
Thanks for your help, the notes we have are quite ambigiuous. There is a section that states that 2 of the and gates could have the same function and cancel out.