You can't (at least not that I know). The .MODEL statement tells LTSpice to model a specific 'simple' component, such as a transistor, resistor, diode etc. At the end of every .model statement line is a D (for diode), NMOS for an N channel FET etc. Your model has a NIGBT at the end which is a component not recognised by LTSpice. The only way around this is to use a dedicated .subckt statement and Fairchild appears to do this.
A .subckt statement tells LTSpice to look for a subcircuit made up of several simpler .model statements. Thus you can build one component made up of lots of smaller simpler (.model) components (like an op amp). Looking at the Fairchild model, it looks like they have build the subcircuit around an NMOS front end with an npn back end.
You might want to post something on the Yahoo LTSpice user group to see what they come up with. Failing that, get the datasheet of the Fairchild part next to teh datasheet of your part and modify the Fairchild model accordingly