Normally if you take the input high, the NFET switches on and PFET off. If you take it low, the PFET switches on and NFET off.
If the input idles low, the 0.1uF cap charges via the 10k resistor. When it is fully charged, the gate of the PFET is high, so the PFET is off. As the input is low, the NFET is off too.
Take the input high, the 0.1uF cannot discharge quickly as its current is limited by the 10k resistor, so the voltage at the gate of the PFET tries to go 5V above the supply. The 1N4148 catches the excess votlage and discharges the cap into the Vcc rail. As the input is high, the NFET switches on.
When the input goes low, the PFET switches on, passing current to the LC circuit on the output.
take the input high again the NFET switches on and the energy in the LC circuit is allowed to circulate in a loop around NFET, ground, L and C.
Take the input low and the PFET switches on, passing another pulse of energy to the LC circuit and so the circuit continues to operate.
The ac coupling of the input to the PFET means that the PFET is only on for a short amount of time (enough to conduct energy to the LC circuit), but also enabling the PFET to remain switched off (it is held off by the 10 resistor across its gate-source) when the input is idling low.