PWM with 74HC163 Counter?

[alkisbkn]

Hello,

for my project's needs, I am designing a PWM motor speed controller based on the article located in the following site:
**broken link removed**

(look near the end of the page, at the PWM generating circuit)

I understand all the theoretical parts of it, except, why is he using a 4-Bit Counter? Can someone explain this bit to me, or point me to some related article?

Thank you very much in advance.

 

[crutschow]

The counter outputs are connected through different value resistors to the summing junction of a op amp. The op amp generates the sum of the counter outputs that are high at any given moment. Due to the different resistor values and the sequence of the count outputs, the result is a crude sawtooth waveform with 4-bit resolution (16 steps) at the op amp output. The table below the schematic shows the two op amp output voltages for each of the 16 steps.

 

[alkisbkn]

But, if the counter output is, say, 0011, won't the sum be 10 ? (5v + 5v of the two last bits)

The summing I do doesn't correspond to the values of the table. Is there something I am missing?

 

[crutschow]

You are missing how a summing amp works. The gain of the first op amp is equal to the feedback resistor divided by the input resistor for each input. The output of the first op amp is thus equal to the bits that are high times minus 5V times 10K divided by the resistor value of that bit. (The output is negative since the op amp circuit is connected as an inverter). Thus when the counter is 0011, the op amp output is -(5V * 10k/80k) - (5V * 10k/40k) = -1.875V, the same as the table shows.

 

[alkisbkn]

I see, I understand now.

Thank you so much for your help my friend!