Is there anything FPGA configuration setting or manipulation of the clock edges for FPGAs that allow you to slow down the transition times to relax termination requirements when you aren't trying to run the FPGA at very fast clock speeds? I'm curious about all FPGAs in general, but I plan to use the Spartan 3A-DSP.
Does anyone also have any idea what happens on a daisy-chained bus when each device has a series termination resistor? This paper:
https://www.electro-tech-online.com/custompdfs/2010/07/xmsnLine_notes.pdf
only talks about series termination at the source. It also says "In order to satisfy Kirchhoff’s laws, a voltage wave of the opposite polarity propagates back down the line, canceling the original wave." and I'm having trouble figuring out exactly why that is for transients.
EDIT: I hunted around on some EDA boards and they mentioned something about selecting IO standards with slower transition times? And that it's bad practice to do things like add capacitors-to-ground to the line, or add RC filters to slow the transition time (which is rather impractical anyways since you have hundreds of IO running around). Especially for the capacitors-to-ground it since it seems like it could easily start to increae heat on the drivers. Anyone care to elaborate or add their own thoughts?
Does anyone also have any idea what happens on a daisy-chained bus when each device has a series termination resistor? This paper:
https://www.electro-tech-online.com/custompdfs/2010/07/xmsnLine_notes.pdf
only talks about series termination at the source. It also says "In order to satisfy Kirchhoff’s laws, a voltage wave of the opposite polarity propagates back down the line, canceling the original wave." and I'm having trouble figuring out exactly why that is for transients.
EDIT: I hunted around on some EDA boards and they mentioned something about selecting IO standards with slower transition times? And that it's bad practice to do things like add capacitors-to-ground to the line, or add RC filters to slow the transition time (which is rather impractical anyways since you have hundreds of IO running around). Especially for the capacitors-to-ground it since it seems like it could easily start to increae heat on the drivers. Anyone care to elaborate or add their own thoughts?
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