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Solid State Tesla Coil Burning Mosfets

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Okay this was after I re-tuned it. even tho the last yellow wave was not above 12v this seems better since you can see D10-D11 clamping(Cutting the top of the wave off) not sure if this is whats suppose to be seen. Blue was still on X10 probe, I forgot to change settings on the pic so youll see 6.72v, that is actually 67.2v..X10 sry

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Id like to add, Why does this seem 90* out of phase, Is this usual?
 

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Once again you're not making much sense. You need to be more descriptive about what you're referring to. You seem to bounce all over the place. For example, "After actually running it I could no longer read the highs and lows like in the beginning." Which highs and lows? You don't even specify which waveform you're talking about!

I asked to see side-by-side waveforms of the D10-D11 node for the CT and for the antenna. They need to have the same settings so that they are comparable. Can you do this for me please?
 
I also changed up My GDT as you suggested, I used Cat5e cable, So I noticed a huge difference on the scope. I was talking in the beginning of this thread, when I probed a high side and low side gate(oppositely switching) I couldn't see dead time due to one being much higher voltage then the other. After the GDT re-wrap I can probe any of the 4 and they are identical voltages with the exact same swing negative. If I probe same switching fets, high and low, They lay right on each other beautifully.. This is a good sign right?

Im not sure if you just skimmed through that post but I was talking about the GDT, Then said as I probed the High and LOW side gates(oppositely switching), I was referring to the GDT output at the mosfet gate. At the bottom of the post I said "If I probe same switching FETs, High and Low..... My apologizes I will be more descriptive in my posts.

I asked to see side-by-side waveforms of the D10-D11 node for the CT and for the antenna. They need to have the same settings so that they are comparable. Can you do this for me please?

My bad, I thought you wanted to see that node just for antenna, then me to probe the CT "OPEN" with the 2 channels at the same time. If your asking to Probe that point with antenna and then with CT, sure I can do that on the same settings. I'll tell you right now though, its just flat with the CT (no waveform). But I'll post it up today.
 
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Okay same settings, #021 is with antenna #022 is with CT. Im getting nothing at all. But you saw in the last post pics I get 60v out of the CT if one pins grounded and other just probed. So the material is fine, signal is transferring, Its gotta be something with my circuit.. hmmmmm
 

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Something else that may or may not be an issue, the CD40106 can only handle absolute maximum input voltages of Vdd + 0.5V, or 12.5V in your case. If your diodes have a forward voltage of 0.65V, then that means you're allowing 12.65V to appear at the input. While this isn't much higher than the rating, it could still cause damage, or at least undesired operation. You should be using low-drop Schottky diodes for D10 and D11. It's difficult to tell if this is your problem or not, but definitely a change you should make.
 
The max VDD is the maximum supply voltage you can give the chip. You are giving it 12 volts, so no worries there.

Vdd + 0.5V is the maximum input voltage you can give it -- that is, the maximum voltage you can put at any one of the logic inputs. I am not talking about the supply pins here. Since you are giving it 12V, the voltage at any one of the logic inputs can be no more than 12.5V, which is your Vdd + 0.5V.
 
Okay I see, Thanks for explaining that. So I have some 1N5819's with a voltage drop of 0.2v would that be better? They say Schottky barrier diode so I'm not sure if thats' okay.
 
Okay I see, Thanks for explaining that. So I have some 1N5819's with a voltage drop of 0.2v would that be better? They say Schottky barrier diode so I'm not sure if thats' okay.
Technically yes, but you must make sure that the output from the CT does not exceed the 40V rating of the 5819. I would really recommend using a higher voltage Schottky instead, just to make sure it doesn't fail.
 
Okay ya so my 60v output of the CT right now would fry that for sure. Well that's all I got I think. I'll poke around more but if I use those I'll drop enough turns on the CT to be in the 20v range.
 
The reacquiring talk about the "antenna" not working with one leg 'grounded' has been bothering me in this thread. Isn't an antenna supposed to be "floating"? To absorb the energy? With one leg 'grounded' won't the signal be shunted to the ground?
 
The reacquiring talk about the "antenna" not working with one leg 'grounded' has been bothering me in this thread. Isn't an antenna supposed to be "floating"? To absorb the energy? With one leg 'grounded' won't the signal be shunted to the ground?
I believe when the OP was talking about grounding one leg, he was referring to the CT, not the antenna. The antenna works just fine.
 
Okay I did another mains test today just for sh*ts and gigs. I was able to run it on mains for a long time no problem, up to a 10amp fuse on mains and About 30% on dimmer. Fets finally got warm to the touch. Guessing from earlier tests, most likely around 80-90v. I then went up to 40% on dimmer and popped the fuse. So I put a 15amp fuse in, I ran 40-45% on dimmer for about 25 sec till it stopped. No loud noise at all, just stopped. I checked and found two fets fried, One high one low, Same switch. This was with a 74hc14. Found some surface mounts I had.

So If I ran well up to that point to you think its time for an IGBT test? Please let me know any doubts in your mind. It may be over current but I keep coming back to the fact that two are switching at the same time, sharing current. So max 400W a piece, 15amp*100V=1500W/4=375W a piece? So am I 750W of 800W total or am I 375W of 800W total?

I only stray away from making the switch just yet cuz I'm not getting the fets hot yet. If they can run in the 120*c range fine, I don't think I'm past the power threshold yet. So In your opinion, circuit or Fets? I mean this is practically the same circuit as the lonescience guys. So I feel if his circuit worked mine should, and that's what makes me stray back to Fets...UGH LOL


EDIT:
Okay I thought of something else here. This is a different failure then before/ever. earlier I popped two fets, high and low, but oppositely switching. So a high and low that where connected by source(high side) and drain(low side) on output rail. This time I popped a high and low but same switched(opposite output rail). This is cool because it's something different but it's also confusing. How does one low side fet fry(short) without the high side fet(oppositely switching) on the same output rail not fry? If you have a short from ground to output how does the next inline, switching positive to that same output, not short that one through the first fried fet? Causing that one to blow?

So I'm hella lost here. Can someone explain how this is possible? Only thing I could think of is maybe I didnt have one fet working so I was on a three fet bridge. Although if that where the case I should have three fried fets........
 
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Usually if you have a high and low FET fry it is because they were both on at the same time, allowing the full bus voltage across them and causing a practical short circuit. This allows loads of current to pass through them, frying them. When two FETs on the same side of the H-bridge are on at the same time it is because of a timing issue -- one is not allowed to fully turn off before the other turns on. A decent scope would show you this and would help you to adjust the timing with the help of phase lead (which you do not currently have and, strangely enough, I cannot seem to find cases where it was used on basic SSTCs -- only DRSSTCs). Phase lead allows you to adjust when the feedback signal gets to the logic circuitry so that you can make sure it gets to the driver just in time for it to switch the FETs on/off when the current through them is crossing zero.
 
So yes thats what was previously happening. This time its opposite side, same switching fets. So thats what im lost about, you just said yourself after one frys the other on that side will as well. In this case it did not. each side of my primary only has one fet fried, a high on one side and a low on the other. they are 100% on opposite output rails.
 
So yes thats what was previously happening. This time its opposite same switching fets. So thats what im lost about, you just said yourself after one frys the other on that side will as well. In this case it did not. each side of my primary only has one fet fried, a high on one side and a low on the other.
Oh I see what you're saying. I thought you were saying that the high side and low side FETs on one side of the H-bridge fried, but you're actually saying it's the opposite FETs that failed.

This suggests that you had too much current passing through the primary coil. There are two possible reasons that I can think of right away that can cause that: Too high of a pulse width and too few primary turns. Both of these could very well be the problem, considering you said you only have a few turns on the primary coil. It might be time to start focusing on why you can't get it to work with more turns. Instead of acting like an inductor that restricts alternating current flow, the primary coil may have acted more like a low-ohm resistor, allowing too much current through. The easiest thing to change right now, however, is your pulse width. Replace the FETs and try a lower duty cycle and see if that helps anything. From there we can look at increasing the number of turns on the primary coil.
 
This has been a long and kind of confusing thread. How much headroom are you giving on your FETs? Most times your supposed to be using a component at around half of it's rating. Not near it's reported rating.
 
This has been a long and kind of confusing thread. How much headroom are you giving on your FETs? Most times your supposed to be using a component at around half of it's rating. Not near it's reported rating.
The FETs he is using are IXTQ50N25s, which are 50A 250V. He shouldn't be getting anywhere near that unless he gets a short circuit.
 
Okay I did pop all four, The other two fried open had to remove them to see that. So if its a timing issue causing shorts. How can it run no problem on 95v 10amp??? This was the longest runtime i have done, on 10 amp fuse.

Only other issue I can see right now is maybe Im not getting a full ON, since i designed this with a 20v gate max. now knowing 30v, I have 20V TVs on the way but with these fets should I scrap the clamping zeners for now and bring gate voltage up to 24Vish? After last GDT wrap, gate voltage is at 15.4v.. Wouldn't I see this problem or any for that matter happen at 95v 10amp?
 
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After looking at the data sheet I'm second guessing my Vgs statement, Maybe Im reading the graph wrong but Vgs-Id says at 6.8v VGS I'll output 100amps. So I should be fully on with 15.4v Vgs right?
 
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