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SPI BIOS EEPROM Project

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ACF2802

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I just upgraded my motherboard and its got a 4MB serial flash that stores the BIOS code. It's an 8 pin SOIC that uses SPI bus interface. There is a 9 pin header on the board that connects directly to the SPI bus and VCC/GND that is used for programming the chip. I was wanting to come up with a small device that I could stick on the header that has a secondary eeprom that would override the one on the board. I want it to work without modifications to the motherboard itself.

Anyone have any ideas on how it could be done? My initial idea was to simply hook the 2nd chip up to the SPI bus, but have it's SS pin wired to ground so that it is always enabled. Then, I would drive the SS pin on the header high (since SPI has active low and SS is basically a chip select). This would force the chip on the board to be disabled and the one on the card to be enabled. The problem is that these flash chips (here is the one I was going to use, but I assume it goes for all SPI EEPROMS https://www.electro-tech-online.com/custompdfs/2010/01/doc3680.pdf) need to be asserted and then un-asserted for every operation, so simply leaving it enable permanently would not work.

I hope someone here could help me come up with an idea.
 
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Yes, usually chip select disable/enable means an end of transmission/start new transmission. It doesn't sound like it's possible without breaking the chip select line to the on board chip to do what you want to do. I certainly can't think of a way around it.
 
The data sheet says that all or part of the memory can be read out in a continuous stream using the 'Read Array' instructions 0x1B,0x0B and 0x03. It might be possible that the module is meant to be read once per power-on, with CSn only being used once for a single, long readback.
 
The data sheet says that all or part of the memory can be read out in a continuous stream using the 'Read Array' instructions 0x1B,0x0B and 0x03. It might be possible that the module is meant to be read once per power-on, with CSn only being used once for a single, long readback.

I'll have to boot the computer up with a logic analyzer to see what it's doing. Still, it could lead to problems.
 
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