Because the resistor has to do two things simultaneously; one it to provide the RC delay, the other is to bias the gate into its "linear" range where it exhibits voltage gain. TTL requires you to sink a lot of current out of its input to bias it to the center of its switching range. Look at a datasheet for a TTL gate and read IiH, IiL, ViH, and ViL specs. Now do the same for a CMOS gate. Its mA for TTL, while it is only uA for CMOS, so R can be up to several megOhms in CMOS, allowing delays (or oscillator periods) of 10s or seconds.