When Q1 turns off, it does not go from "fully enhanced" to "totally blocking" in zero time.......and therafter current only flows into the cds capacitor.......the current that flows into the cds capacitor is extra current. As the drain voltage of q1 rises up to the clamp capacitor voltage, the full peak primary current flows through the rdson of Q1....yes, current also flows into the cds capacitor, and into the cgd capacitor, but that is a current given by I = c.dv/dt.
The turn off of Q1 has just as much switching loss as it would in a 2 transistor forward converter....and the 2 transistor forward converter is what the active clamp forward converter competes with.
Hi again,
They are not stating that it goes from on to off in zero time. Here is a direct quote from the paper:
Code:
With sufficiently fast gate drive,
the turn off of Q1 can be virtually lossless. To
accomplish this, the gate of Q1 must be turned off
(and the flow of current stopped) before the drain
voltage has a chance to rise. The rise of the drain
voltage is delayed due to the drain-source capacitance;
a robust gate driver can turn off Q1 before
the drain voltage increases significantly. The use of
a compound gate driver made up of MOS and
Bipolar devices provides a high peak gate discharge
current to ensure a fast turn off and reduced
switching losses.
Note the last sentence, "...and reduced switching losses.".
I think you are just taking the previous statement "virtually lossless" too much to heart without considering the entire passage which balances that out a bit.
We have basically a switch, a current source, and a capacitor. The capacitor is in parallel with the switch. The current source feeds the switch and cap. When the switch is on, all the current passes through the switch and the cap voltage is zero. As the switch starts to open it's resistance increases, and the current starts to flow in the cap and the voltage across the cap starts to rise. The instantaneous power in the switch is vC*Iswitch (both functions of time).
It is simple to see that if we can make Iswitch go low fast, vC does not get too long of a time to charge up.
Since the time it takes Iswitch to decrease is directly related to the gate drive current, the more drive current we apply the faster the Iswitch current goes to near zero, and so the less power dissipation.
At some point the total power caused by vC*Iswitch over all time gets lower than some threshold which when compared to the switches overall power dissipation (at other times) turns out to be very very low. That's the point where we have the right gate drive current.
Although it may not be exactly zero, when compared to other power dissipation times in the circuit or even other drive topologies the power profile can be called "virtually lossless".
Please also note that they are talking about a specialized high current driver too, which would provide a huge current for the gate during turnoff.
Another similar scenario is when we turn a MOSFET on for the first time into an inductance. The voltage goes from max to zero in a very short time but the current is near zero so there is "virtually no power dissipation" in the MOSFET. This will happen every cycle in some converters.