XR2211 is an FSK Demodulator/Tone Decoder chip. I have made a demudulater as described in its datasheet, but i am not quite clear how it worked. according to its circuit, it simply contains 2 mixers, and how can a mixer output an DC level after low passing? I mean if there is an input signal with a frequency f1, and the LO is also f1, the mixer will output an cos(phi) after low passing, the phi is the phase difference between f1 and f2, theoretically, if f1 and f2 are quardrature(90 deg. phase difference), the output is 0, only if they have little phase difference could the mixer output an recognizable DC voltage, so how can the mixer output an stable DC level as an indicator of the tone decoding?
no, it is not a PLL, it is a chip like LM567, it has a VCO, and 2 mixers, if you want to build a PLL, you have to add a phase detector and a loop filter as well as frequency divider if necessary. In its datasheet, there is a tone decoder application schematic and it really works. what I would like to know here is the principle for the application, the problem is posted above.
no, it is not a PLL, it is a chip like LM567, it has a VCO, and 2 mixers, if you want to build a PLL, you have to add a phase detector and a loop filter as well as frequency divider if necessary. In its datasheet, there is a tone decoder application schematic and it really works. what I would like to know here is the principle for the application, the problem is posted above.
I must appologize for not noticing its general discription in its datasheet, but how can it be a PLL since there is no phase-comparator on the chip , ? as far as I know, PLL should include a phase-comparator in the loop(usually a PFD or XOR gate).
no, it is not a PLL, it is a chip like LM567, it has a VCO, and 2 mixers, if you want to build a PLL, you have to add a phase detector and a loop filter as well as frequency divider if necessary. In its datasheet, there is a tone decoder application schematic and it really works. what I would like to know here is the principle for the application, the problem is posted above.
I must appologize for not noticing its general discription in its datasheet, but how can it be a PLL since there is no phase-comparator on the chip , ? as far as I know, PLL should include a phase-comparator in the loop(usually a PFD or XOR gate).
Look at Figure 1 in the datasheet. The block called Loop Θ-Det is the phase detector for the PLL. See also P.5:
The main PLL within the XR-2211A is constructed from an input preamplifier, analog multiplier used as a phase detector and a precision voltage controlled oscillator (VCO).