Add GPS/PARSE to 8xSERVO-MOTOR CODE in Oshonsoft

tumbleweed said:

As usual, this thread has been "continued" over on another forum, with all the offending reasons for the code blocking issues being pointed out there that we were never privy to unless you try to piece together all the various bits and pieces about this project spread out across multiple forums/threads.

They get 1/2 the story, we get 1/2 the story. Once they "fix" their half on the other forum , it'll probably reappear here with a bunch of new code that screws up the half shown here.

It's no wonder this project has been going on for years now...

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Pommie said:

I wrote most of that (this) code but gave up when delays and software serial, which also blocks, was added. I wrote it in C on a 18F2620 and then converted to basic. Unfortunately, a disk crash cause it all to be lost. I think it ran at 32MHz using the internal oscillator. Actually just looked and found an early version that used PPS to steer the CCP1 output to the PORTB pins and it uses 32 MHz. Couldn't figure out pointers in basic so changed it.

Mike.

Click to expand...

tumbleweed said:

It's no wonder this project has been going on for years now...

Click to expand...

Pommie said:

I wrote most of that (this) code but gave up when delays and software serial, which also blocks, was added. I wrote it in C on a 18F2620 and then converted to basic. Unfortunately, a disk crash cause it all to be lost. I think it ran at 32MHz using the internal oscillator. Actually just looked and found an early version that used PPS to steer the CCP1 output to the PORTB pins and it uses 32 MHz. Couldn't figure out pointers in basic so changed it.

Mike.

Click to expand...

Pommie said:

You are correct but, if I remember correctly, the on time is always 500uS followed by an off time equal to the servo time less 500uS.

The gap time is how you explained it.

Mike.

Click to expand...

camerart said:

On one of the forums, possibly this one, this was discussed and how the SHIFT REGISTER was introduced.

Click to expand...

  // T3 = 16 bit timer used as the clock source for CCP, input 64 / 8 = 8MHz
  setup_timer3(TMR_INTERNAL | TMR_DIV_BY_8, 0x0007);
 
  // Output compare 1, used to control the shift register clock
  setup_compare(1, COMPARE_TIMER3 | COMPARE_CONT_PULSE);

void servo_interrupt(void) {
    
    if(s_index < NUM_SERVOS) { // All servos already done?
        // No, do next servo
        
        // Set the duration for this output, as a new offset
        // from the last compare time.
        s_time_set = s_time_set + s_time[s_index];
        
        // Write the compare time to CCP 1 register.
        // Each shift reg clock pulse will be high for 10uS.
        set_compare_time(1, s_time_set, s_time_set + SERVO_CLOCK);

        // Increment index for next servo time value
        s_index++;
        
        // Write the shift data in to low
        output_bit(SERVO_DATA, 0);
    }
    else {
        // Add a fixed time increment for delays before
        // restarting the sequence.
        
        s_time_set = s_time_set + SERVO_INTERVAL; // add 1.5mS for the next interrupt
        // Update CCP
        set_compare_time(1, s_time_set, s_time_set + SERVO_CLOCK);
        
        
        if(s_index > 9) {
            // 10 * average 1.5mS = 15mS, a reasonable frame repeat time
            
            // Set up for a new sequence
            s_index = 0;           

            
            //s_time_now = get_timer3(); // Get the sync timer present count and           
            s_time_set += 1000; // set a delay for the start of the first pulse

            // Write the compare time to CCP 1 register.
            set_compare_time(1, s_time_set, s_time_set + SERVO_CLOCK);
            
            output_bit(SERVO_DATA, 1); // Write the shift data in to high
            
            // The next compare will start the first output pulse [channel 0]
            
            servo_frame_count++;
            
        }
        else {
            s_index++;
        }
        
    }
 
}

rjenkinsgb said:

I posted the original pure interrupt & shift register servo routines, I believe.

This is a shift register version from one of my working projects; it's in CCS C for a PIC24 / DSPIC with pulse capable CCP.
(Just the output section of a rather larger servo library that includes timed ramps, zero offsets and travel limits etc.)


Initialisation:

C:

  // T3 = 16 bit timer used as the clock source for CCP, input 64 / 8 = 8MHz
  setup_timer3(TMR_INTERNAL | TMR_DIV_BY_8, 0x0007);
 
  // Output compare 1, used to control the shift register clock
  setup_compare(1, COMPARE_TIMER3 | COMPARE_CONT_PULSE);

Routine called by OC1 compare interrupt:

C:

void servo_interrupt(void) {
   
    if(s_index < NUM_SERVOS) { // All servos already done?
        // No, do next servo
       
        // Set the duration for this output, as a new offset
        // from the last compare time.
        s_time_set = s_time_set + s_time[s_index];
       
        // Write the compare time to CCP 1 register.
        // Each shift reg clock pulse will be high for 10uS.
        set_compare_time(1, s_time_set, s_time_set + SERVO_CLOCK);

        // Increment index for next servo time value
        s_index++;
       
        // Write the shift data in to low
        output_bit(SERVO_DATA, 0);
    }
    else {
        // Add a fixed time increment for delays before
        // restarting the sequence.
       
        s_time_set = s_time_set + SERVO_INTERVAL; // add 1.5mS for the next interrupt
        // Update CCP
        set_compare_time(1, s_time_set, s_time_set + SERVO_CLOCK);
       
       
        if(s_index > 9) {
            // 10 * average 1.5mS = 15mS, a reasonable frame repeat time
           
            // Set up for a new sequence
            s_index = 0;          

           
            //s_time_now = get_timer3(); // Get the sync timer present count and          
            s_time_set += 1000; // set a delay for the start of the first pulse

            // Write the compare time to CCP 1 register.
            set_compare_time(1, s_time_set, s_time_set + SERVO_CLOCK);
           
            output_bit(SERVO_DATA, 1); // Write the shift data in to high
           
            // The next compare will start the first output pulse [channel 0]
           
            servo_frame_count++;
           
        }
        else {
            s_index++;
        }
       
    }
 
}

Click to expand...

rjenkinsgb said:

I posted the original pure interrupt & shift register servo routines, I believe.

This is a shift register version from one of my working projects; it's in CCS C for a PIC24 / DSPIC with pulse capable CCP.
(Just the output section of a rather larger servo library that includes timed ramps, zero offsets and travel limits etc.)


Initialisation:

C:

  // T3 = 16 bit timer used as the clock source for CCP, input 64 / 8 = 8MHz
  setup_timer3(TMR_INTERNAL | TMR_DIV_BY_8, 0x0007);
 
  // Output compare 1, used to control the shift register clock
  setup_compare(1, COMPARE_TIMER3 | COMPARE_CONT_PULSE);

Routine called by OC1 compare interrupt:

C:

void servo_interrupt(void) {
   
    if(s_index < NUM_SERVOS) { // All servos already done?
        // No, do next servo
       
        // Set the duration for this output, as a new offset
        // from the last compare time.
        s_time_set = s_time_set + s_time[s_index];
       
        // Write the compare time to CCP 1 register.
        // Each shift reg clock pulse will be high for 10uS.
        set_compare_time(1, s_time_set, s_time_set + SERVO_CLOCK);

        // Increment index for next servo time value
        s_index++;
       
        // Write the shift data in to low
        output_bit(SERVO_DATA, 0);
    }
    else {
        // Add a fixed time increment for delays before
        // restarting the sequence.
       
        s_time_set = s_time_set + SERVO_INTERVAL; // add 1.5mS for the next interrupt
        // Update CCP
        set_compare_time(1, s_time_set, s_time_set + SERVO_CLOCK);
       
       
        if(s_index > 9) {
            // 10 * average 1.5mS = 15mS, a reasonable frame repeat time
           
            // Set up for a new sequence
            s_index = 0;          

           
            //s_time_now = get_timer3(); // Get the sync timer present count and          
            s_time_set += 1000; // set a delay for the start of the first pulse

            // Write the compare time to CCP 1 register.
            set_compare_time(1, s_time_set, s_time_set + SERVO_CLOCK);
           
            output_bit(SERVO_DATA, 1); // Write the shift data in to high
           
            // The next compare will start the first output pulse [channel 0]
           
            servo_frame_count++;
           
        }
        else {
            s_index++;
        }
       
    }
 
}

Click to expand...

Pommie said:

I remember this as my first code used peripheral steering to map the output of the CCP module to the pins of PORTB. You didn't understand how the gaps worked in my code (so each output would start on a 2.5mS period). Hence the shift register was added. Never could figure out how to do PPS via pointers in Oshonsoft.

Mike.

Click to expand...