I never mentioned an EEPROM on the I2C bus, but the processor has a means of storing info for program execution. This cannot be I2C. I2C EEProms are designed to store configuration data. Often EEProms have to be erased in blocks.
I did mention this chip which is a PCA8575: https://www.google.com/url?sa=t&rct...pOYQQCnRgxetOEDSvLaCiWw&bvm=bv.58187178,d.cWc
At this point, let's just assume that the part will work. One drawback is the package is surface mount. There is a company (www.proto-advantage.com) that will purchase chips from www.Digikey.com and place them on a DIP adapter for a very small cost.
So, in simple terms, the IC can detect a change in state and generate an interrupt. When the state is read, the interrupt is cleared.
What more do you want?
Well, some software that prioritizes, ignores and/or aborts a sequence if two are pressed at once. Your choice.
so, the processor spends most of it's time doing.
(Pseudo code)
100 sleep 1000
Goto 100
or if the uC supports it; Wait for Interrupt.
I2C is actually a multi-master multi-slave protocol, but I don't think it is here.
Many chips, have a way of specifying external to the chip a few addressed that it responds too. AD0, AD1 and AD2 pins do exactly that. That allows you to place eight of these chips on one I2C bus.
I did mention this chip which is a PCA8575: https://www.google.com/url?sa=t&rct...pOYQQCnRgxetOEDSvLaCiWw&bvm=bv.58187178,d.cWc
At this point, let's just assume that the part will work. One drawback is the package is surface mount. There is a company (www.proto-advantage.com) that will purchase chips from www.Digikey.com and place them on a DIP adapter for a very small cost.
So, in simple terms, the IC can detect a change in state and generate an interrupt. When the state is read, the interrupt is cleared.
What more do you want?
Well, some software that prioritizes, ignores and/or aborts a sequence if two are pressed at once. Your choice.
so, the processor spends most of it's time doing.
(Pseudo code)
100 sleep 1000
Goto 100
or if the uC supports it; Wait for Interrupt.
I2C is actually a multi-master multi-slave protocol, but I don't think it is here.
Many chips, have a way of specifying external to the chip a few addressed that it responds too. AD0, AD1 and AD2 pins do exactly that. That allows you to place eight of these chips on one I2C bus.