DPDT switch function using MOSFET's: how to?

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earckens

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Two poles A and B need to be fed from source + and -, alternating (switching every few minutes) the polarity to A and B. Normally this is easily done with a DPDT relay. I would like this to be done using (four?) MOSFET's.
The source is a 5V low frequency (10.., 200,.. Hz) square wave. Max current = 100mA.

Can this be done and how?
 
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The high side mosfets have to have their gate voltage 3-10 volts above the supply voltage and so need specialised drive circuitry. I'd just use a ready built module EG This one.

Mike.
Edit, That bridge would be fine.
 
That is a very interesting circuit.

My I kindly ask you to adapt this schematic so that there is a IN1 to control cuurent going the one way, and a IN2 to control the current going the other way through the load?

Thanks!
 
1. no need for gate resistor?
No need. They are to prevent oscillations in high frequency circuits and that's not a problem here
2. will the gate voltages be high enough to drive the MOSFET's in saturation?
Depends upon the voltage and the MOSFETs used.
As I previously stated, for a 5V supply and 5V gate drive, the MOSFETs need to be logic-level types, with a gate threshold voltage Vgs(th) of 2V maximum.

A pedantic note: when a MOSFET is used as a switch they are not driven into saturation (which is the active region in a BJT) but into the linear (or ohmic) region, as shown below (which is the saturation region in a BJT).
Why the solid-state physicists used the same word for a different operating state in a FET as compared to a BJT is beyond me. Guess they thought they would throw that in there just to confuse the rest of us
And it worked.


 
Hi, thank you for that very informative answer. Not pedantic at all but very usefull and funny too
 
Hi, I try using a 555 output to change polarity on the load, with a MOSFET p-channel inverter so that IN1 is driven directly from the 555 and the IN2 is driven from the inverter. The issue I have is that the inverter has a slight delay causing both IN1 and IN2 to be on for the slightest amount of time and in effect causing a short between V1 (supply voltage) and ground.

So what would be needed is interlocking between IN1 and IN2 as there is on the regular L298P; how can this be achieved as simple as possible (frequency <200Hz)?
 

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That is called cross-conduction or shoot-through, and is a common problem in totem pole and H-bridge circuits. Wally's timimg diagram shows a gap between when in1 changes state and when in2 does. If you cannot cause that to happen in your system, then a small asymmetrical time delay is added to the input signals so they change state in the proper sequence.

ak
 
I have another question:

for my specific purpose I need to have 2 of these bridges (bridge 1 and 2), but with M2 (the one side of the load, of bridge 1) connected to M2 (one side of the load of bridge 2) of the other bridge, with IN2 being the same signal (both IN2 simultaneously high or low). So that when the current (<100mA each) goes through both loads their respective connected sides of the load either sink or source together.

The purpose is to use the loads as sensors for liquid monitoring: the sensor consists of a probe with 3 conducting vertically positioned stainless steel bolts. With these 3 bolts I need to measure the liquid in either low (none conducting), medium (lower and middle pin conducting) or high (upper pin also conducting).

EDIT: a current limiting series resistor per load prevents short circuit and is used for current measurement.

Is that double bridge setup electrically possible?
 
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Here is a schematic proposal of what I have in mind. Lug P7 and P11 are connected together, both are driven in phase.
 

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ok, thks. Solved: issue was due to overcurrent on the load, I had mistakenly used a 4 ohm power resistor instead of 40 ohm.
 
Here is a schematic proposal of what I have in mind.

If you change to a CMOS 555 (lmc555), the output swings much closer to both rails, assuring a complete turn-off of the three FETs it drives.

Add a pull down resistor from the Q7 drain to GND to assure turn-off of the two FETs it drives.

ak
 
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