Freq divider by 4?

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No, just more crap posted on the internet by some "expert". Leave out the wire from Q0' to d0, and it becomes a Gray code counter with four states which will divide by four.
 
Er!!! No the second D type should be clocked by the first.. The way they have it Q1', Q0' and D0 will fry!!
 
Probably because they cut-and-pasted the divide by 2 D-FF from 3 slides previous and forgot to remove the line.
 
Ian Rogers said:
Er!!! No the second D type should be clocked by the first.. The way they have it Q1', Q0' and D0 will fry!!
Click to expand...

No, if you do it like I said, it is a synchronous counter with the external clock going to both Clk inputs. The way Ian suggests turns it into a ripple counter, with its usual hazard problems.

 
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MikeMl said:
No, if you do it like I said, it is a synchronous counter with the external clock going to both Clk inputs. The way Ian suggests turns it into a ripple counter, with its usual hazard problems.
Click to expand...
I tried it your way, I doesn't divide by four.... The ripple counter does.... Anywho the OP was right!!! doesn't work as shown!!

Opps!! Sorry Mike you are correct.... Just tried it again...
 
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As you can see in the sim above, the Gray Code counter counts 01320132... The two outputs are in phase quadrature.
 
A "divider" is nothing but a counter. A counter is just a state machine. I learned how to design state machines long before I even heard of dividers. Your reference just muddies the water by talking about designing dividers as though it is a whole new discipline...
 
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