H-Bridge

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kal.a said:
You mean a potential difference between gate and drain?
Click to expand...
Correct gate/drain- I am feeling a bit unwell/not with it after a jazz/blues night/morning at at the Old Duke pub in Bristol yesterday/today
 
Hy kal,

Here is a version of the post #40 bridge circuit which should work OK with a bridge supply voltage from 12V to 40V:

OBSOLETE PLEASE SEE POST #88


​
ERRATA
(1) Motor M1 should not have a voltage or current rating.
(2) OK4 emitter disconnect from 0V(5V) SUPPLY RAIL and connect to 0V (12V to 40V) SUPPLY RAIL
 
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Hy kal,
Re my statement above. I have just realized that I have told you that the 74LS00 would not be any good for the post #40, & by implication post #62, H bridge circuit because it only has an IOL of 8mA min and 10mA is required. While this is true for a worst-case design, in practice a 74LS00 will be fine to use. Here are the reasons:
(1) The data sheet is saying that out of all (not strictly true but accept for time being) the millions of 74LS00s made, they will all sink at least 8mA. In fact most will sink a lot more.
(2) IOL is not a critical parameter, as speed is, so the manufacturer is not struggling to meet it.
(3) The data sheet is saying that over the whole temperature range all 74LS00s will sink at least 8mA. The spec sheet temperature means the temperature of the actual silicon, not the ambient temperature. The LS logic family is fabricated with bipolar Junction Transistors (BJTs) which have more gain and current handling capability as the temperature increases. This is the opposite to field effect transistors used in the 'C' versions of the 74xxx families (simplifying again). The silicon temperature is liable to be a lot higher than 0 degC, the 74xxx family lower temperature, especially after the gate output has conducted 8 to 10 ma for a few seconds.
(4) There is a further clue on some data sheets which shows the sink current when the logic gate output is connected to the 5V supply rail in the order of 60mA (as far as I can remember). Note that this would probably be a destructive current for more than a few milliseconds.
(5) You can quite simply check that the sink current is around 10mA by measuring it in the opto-circuit.
(6) Even if the sink current were only 8mA, it is highly likely that the optocoupler would still work well.

So this is a situation where you would be safe breaking the rules in the interests of some advantage- in this case component availability and cost.
On the other hand, if you were designing a mission critical (military), safety critical (aircraft flying controls, medical), or hi reliability critical (space program) application you wouldn't dream of it.

Cheers

spec
 
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Thanks a lot spec for everything.
You know this thread and the one for the encoder interface are my main study of electronics. I keep coming back to read parts of it and slowly digesting the information.
It's great reference.

Cheers
Kal
 
kal.a said:
Thanks a lot spec for everything.
You know this thread and the one for the encoder interface are my main study of electronics. I keep coming back to read parts of it and slowly digesting the information.
It's great reference.

Cheers
Kal
Click to expand...

That is nice to know kal

Thanks

spec
 
Hi spec,

I spent two days reading everything I can find about logic gates to figure out how you used them and I finally decided to ask for help.
The 74AS00N gates have outputs of logic 0 or 1 . Let's say the high is 5V+ and the low is 0V but they do not sink current which puzzles me as that is what's required to turn on the opto as it is wired in the schematic.
How can the opto turn on without its emitter grounded?
 

UK morning to you kal,

​
74xxx Data Sheet
https://www.ti.com/lit/ds/symlink/sn74als00a.pdf
https://www.ti.com/lit/ds/symlink/sn74ls00.pdf

(1) IOL
If you look at the above extract from the 74AS data sheet, you will see that, as you say, Iol is not listed in the left hand column under its own right. But if you look at Vol, you will see that Vol is specified with an Iol of 20mA.

The spec sheet is not really complete, but it is still more complete than it need be. That may sound like a contradiction, but here is the explanation: The 74xxx logic families all have the same logic functions and pin out (not strictly true). The only difference between the families is speed and current characteristics.

Thus, there is a set of generic characteristics for each family so, unless there is something special about a particular chip, it is not absolutely necessary to include the generic characteristics on the individual data sheet for each device. To give an example, all 74xxx have an Iol of 16mA while all 74ASxxx have an Iol of 20mA. Most digital designers know these generic characteristics of by heart and rarely need to refer to a data sheet to check them.

Why is there a difference? In general in electronics, if you want more speed, you have to use more current. So, the faster the chip, the more current it will use. Consequently 74xxx chip inputs source 1.6ma when the input is driven to logic 0 (0V) and the faster, 74AS chip input sources 2mA when its input is driven to logic 0. It follows then, that the output of the chip driving these inputs must have sufficient sink current capability to generate a logic 0 voltage level. In general, 74xxx logic is designed to have a fan-out of 10. That is, each output will drive 10 of its own family, more or less at full speed. This is the reason for the differing currents.

(2) OPTO DIODE LOW DRIVE
When you say that logic gates do not source or sink current that is not true. For example the original family 74xxx chip will source 400uA minimum and sink 16ma minimum. An integrated circuit is no different to a circuit that you would make out of resistors capacitors, diodes and transistors (but having control of the fabrication process chip designers can do some really fancy things which cannot be done with discrete components). In fact, you could quite easily make a 7400 NAND gate from discrete components.


Complete 7400 2 input NAND gate (the twin emitter input transistor is not as weird as it seems and could be replaced by two individual transistors connected in parallel)​

The output stage of a TTL chip works in exactly the same way as the discrete transistor LED drive that you used before; it connects the cathode of the LED to 0V so that LED current flows from the positive supply line, through the current defining resistor, through the LED, through the lower transistor in the gate output and down to 0V.

When the logic gate output goes high the LED turns off fast, because the gate output is active high (totem pole) and sources current to rapidly charge the parasitic capacitances. On the other hand, a transistor switching off would provide no route for the parasitic capacitors to discharge, so the LED would turn off slowly and could cause all sorts of problems with the bridge circuit. In practice, you would add a pull up resistor from the transistor collector to the positive supply line to charge the parasitic capacitors.

(3) LOGIC 0 & 1
Actual 74xxx logic 0 and 1 levels are not actually 0V and 5V respectively, but for the sake of the above description, just assume that they are.

(4) 74Cxxx
74Cxxx are not not made from BJTs but FETs. As a result the inputs take no current. Also, because complimentary FETs are used, when 74Cxxx chips are not switching, 74Cxxx uses no supply current either (not quite true). Interestingly enough you may reach a clock speed where a particular 74Cxxx chip may take more power than a 74LSxxx chip for example. For a number of reasons, including high parasitic capacitors, 74Cxxx chips are relatively slow.

(5) 'S' Families
The 'S' in the 74xxxx family name stands for Schottky diode which are fast diodes with a low forward drop (Vf). These diodes are fabricated between the collector and base of the BJTs making up the logic device. They stop the transistors from voltage saturating and thus make them faster- a voltage saturated transistor takes ages, in the nanosecond world of logic chips, to come out of saturation. One of the reasons why ECL is so fast is that the transistors are well above voltage saturation at all times.

Do you get the impression that voltage saturation and parasitics, especially capacitors, are the bete noire of electronic engineers?

spec
 
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Thanks spec,

I've tried both SN74LS00N and SN74LS38 and can't get either one to work. I put it in a bread board and **broken link removed**an LED to 1Y and both 1A and 1B inputs and the LED is on all the time. I also tried to jumper all the inputs and the unused gate inputs and that did not help either. Any ideas?

Kal
 

Hy kal.

Going by your attached schematic I see you are now using EAGLE

I may have lead you astray when I said that the output of a logic gate driving the optocoupler LED is the same as the transistor you had been using. In principal that is correct but, whereas the BC546/BC556 has a maximum VCE of 65V, the open collector output transistor of the 74LS38 only has a maximum VCE of 7V. You can get 74xxxx open collector chips where the output transistor can take a higher voltage though; these are normally called open collector driver chips or similar. The 74xxx07, and 74xxx17 are examples: http://www.ti.com/lit/ds/symlink/sn7407.pdf

As for the 74LS00 chip with the totem pole outputs; you have been been mistreating it most shamefully. The 24V supply line will drag the totem pole output up to around 24V when it is only speced to a small voltage above the chips actual supply rail voltage (it is worth remembering that, as a general rule, forcing any chip pin outside the supply rails is one of the most destructive things you can do).

The voltage divider R2 (1K3) and R1 (4K7) across the 24V supply line gives 5.2V which you are using as the supply line for the chip. This voltage would be OK if it were not for the 74LS00 5V supply line current. The 74LS38 has a similar problem. From the data sheet, the 74LS00 ICCH (5V supply rail current for a single gate with output voltage high) is 1.6mA max and ICCL is 4.4mA. There are 4 gates in the pak so the total worst case current is 4 * 4.4 ma = 17.6mA. This means that the voltage on the supply pins of the 74LS00 would collapse and could be anything below the required 5V, including 0V.

In conclusion, the only practical way to drive the LEDs with 74xxx logic when only a 24V supply is available would be to generate a low impedance stabilized 5V supply line using a 5V three terminal regulator (LM7805, LM7905 etc). You should then also power the LED from the stabilized 5V rail, rather than the 24V rail.

The other less serious problem is that there is no decoupling capacitors across the supply line. The 74xxx chips would not like that. I would recommend a 100nf minimum ceramic capacitor for high frequency decoupling in parallel with a 47uF minimum electrolytic capacitor for low frequency decoupling. As a general rule of thumb, all supply lines need to be decoupled for high and low frequencies, even simple low frequency circuits which you may think couldn't possibly need decoupling. Remember that the average small signal transistor has a Ft of at least 200mHz and it will not know that it is only performing a low frequency function. The transistors inside a 74xxx chip are incredibly fast so decoupling/good layout is mandatory.

I am afraid that any 74LSsxxx chips that you have connected to the 24V circuit will be toast or at the very least unreliable and should not be trusted. Should you wish to keep them for investigation you should put a distinct cross on the chip case to indicate problems so that the chip in not inadvertently fitted to one of your circuits: I have many components with crosses on them

spec
 
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Thanks spec, this IC stuff is more complicated and more sensitive than transistors and the worst part is they don't blow up so they're no fun.
That's a lot of crosses and I do mean a lot.

By the way I found a SN74HCT00N which is capable of sinking more current and is faster than the 74LS00. What do you think?


Kal
 

Hi kal,
You are not a proper designer until you have blown up a mountain of components- my specialty was power transistors which used to cost the earth. You can still get some spectacular explosions with ICs.

ICs are more complicated than transistors, but most of the common chips are not difficult to understand, especially for a chap like you. Some, chips, like microprocessors are extremely difficult, but even then, with a bit of reading and familiarization with the terms used, you will soon get the hang of it. Don't forget you are covering a lot of ground in a short time. Yes, they can be more sensitive especially fast digital chips- rather than being cart horses they are greyhounds and built for one thing- speed. As a result they can be delicate.

Is SN74HCT00N (74HCT00) a typo, because according to the data sheets:
(1) IOl= 4mA compared to 8mA
(2) IOH= 20uA compared to 400uA
(3) Tpd= 25nS compared to 15nS

By the way, in general, you will not need to worry too much about the speed of the 74xxx logic family because they are way faster than the the 4N25 optocoupler and the MOSFET H bridge circuit.

spec
 
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Nop not a typo. I was looking at another **broken link removed**which an IO (without tue l for LOW) of ±25 mA
But on the Texas instruments datasheet isn't the 4mA is just a test condition and again the IO maximum is also ±25 mA?

Edit:
And the one I linked to doesn't have TPD , it has Tphl , Tplh and Cpd whatever that means

But I'll just stick with what I got, the SN74LS00N


Kal
 
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Hi kal,

You had me thinking there, because an IOL of 25mA does not fit the characteristics for the 74HCxxx family that I know.

The 25mA is not what the 74HCT will generate, it is what it will stand. Between the pins on a chip there tend to be reverse connected diodes, either intentional or parasitic as a result of the fabrication process. What the Maximum Limits table is saying is that those diodes will only take 25mA before blowing. Suppose you had a stabilized 5V supply for a 74HCT00, you could connect a 24V-5V/25ma =750 Ohm resistor minimum from a 74HCT00 gate output to the 24V supply without blowing the chip. You would never even think about doing this in the real world though.

Yes, stick with the 74LS00 chip- that is your best bet.

On thing to remember when you are designing is component availability and cost. Just because there is a data sheet for a component that is perfect for you latest brainwave, does not mean that it is available, or has ever been made for that matter. Also, if the component costs the earth, that would rule it out, or even if it were on a long lead time.

Although there is a wide range of 74xxx families, I think you will find that only a sub-set are still manufactured. The 74LSxxx family is certainly freely available at low cost.

TPD (tpd) is time propagation delay. It is the maximum time between an input signal rising or falling and propagating through the gate and causing the output to go either high or low.

Tphl (TPHL) is time propagation delay high to low. This is the maximum delay between an input and the output going from high to low.

Tplh (TPLH) is the reverse of Tphl

spec

PS: Bit heavy, but have a scan of this:
**broken link removed**
 
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spec said:
Hy kal.

Going by your attached schematic I see you are now using EAGLE
Click to expand...


Hi spec,


I was having a problem with an annoying popup everytime I added a component that I was able to resolve by unchecking "check connect" in the options menu.



I think I'm missing the point. I had two identical voltage dividers, one for the LED and one for the 5V supply rail.I supplied the inputs to the gates but I think I used to divider supplying the LED.


I thought the ICCL and ICCH are for all gates. When they're all low or all high. Texas Instruments **broken link removed**to understanding and interpreting logic gates data sheet is a little difficult read for a newbie and I may be misreading the statement on the bottom of page 51:
"
ICCH is the current into a supply terminal of an integrated circuit when the output is (all
outputs are) at a high-level voltage. ICCL is the current into a supply terminal of an integrated
circuit when the output is (all outputs are) at a low-level voltage."




I did use a 7805 voltage regulator briefly and I'm still also learning how to use them and get them to supply steady voltage specially when under load. I abandoned it for a voltage divider because as soon as I connected it to the chip or anything for that matter the voltage dropped quite a bit. And come to think of it the output was also more than 6V which was surprising to me. I thought a voltage regulator, regulates voltage....accurately. But I'm working and reading on how to use them properly.



I noticed on all your schematic you added in decouplers and I do use them on the final circuits but thought I would do simple breadboard layout to get familiar with them. I will work and all those suggestion and will make more explosions happen
 

Nice work kal- my bad.


Three terminal regulators are extremely useful devices and are also dead easy to use, but there are four pitfalls to look out for:

(1) Dropout voltage
You must ensure that the the regulator never has less than the minimum dropout voltage across it. Very often a regulator is used after a rectifier circuit and reservoir capacitor and it is the trough of the ripple voltage that is the critical measurement not the average DC reading you might see on a DC voltmeter. A dropping out regulator is not as benign as you might think and they can burst into oscillation momentarily around the drop out voltage.

(2) Frequency stability
A voltage regulator uses a high voltage and current gain to ensure good voltage stability and is effectively a power opamp. Thus, once again, a good layout and decoupling are essential or the chip will oscillate and give all sorts of weird symptoms- this sounds like what you were experiencing. You must be getting fed up with my constant nagging about decoupling and frequent warnings about parasitic oscillations by now. In general, if you put 470nF min ceramic, or other high frequency capacitors, from both the chip input and output to OV, as close to the chip pins as possible, you won't go far wrong.

(3) Thermal shut own
It seems like a wonderful thing that three terminal voltage regulators are both short circuit and over temp protected and, for the former, this is true but the thermal protection is a pain and severely limits the applicability of three terminal regulators, pretty much to fixed voltage output applications. The trouble is that voltage regulators, by definition, need to dissipate significant power (ipV-opV) *Iout Watts.

Suppose you wanted to generate a 5v stabilized line from the 24V supply line on your H Bridge circuit and you decided to use a 7805. The voltage across the 7805 would be 24V-5V = 19V and say there was no heat sink on the 7805 thus it would only be able to dissipate around 500mW before shutting down. This means that the 7805 would only supply 500 mW/19 V = 23.6 mA, a far cry from the supposedly 1A rating for the 7805.

(4) Reverse voltage
There is a design goof with many three terminal regulators, 78xx/79xxx and 317xx/337xx families included: they will blow if the output is ever a higher voltage than the input voltage. The solution? Simply connect a 1A min diode (1N400x) cathode to the chip input and anode to the chip output (reverse connected).

You might say that the output is never going to be at a higher voltage than the input by definition. This is true under normal operation, but consider a 7815 chip at turn off: the output will be 15V and if there is a reasonable capacitor across the output it will hold that voltage. But the reservoir capacitor may discharge rapidly so then you have a destructive situation. The protective reverse connected diode will easily prevent this from happening by discharging any output stored voltage into the input circuit.

I would recommend that you drop everything else and get a good working 78xx/79xx power supply under your belt before you go any further kal. Incidentally the later 317xx/337xx three terminal voltage regulators are much better than the 78xx/79xx three terminal voltage regulators.

kal.a said:
I noticed on all your schematic you added in decouplers and I do use them on the final circuits but thought I would do simple breadboard layout to get familiar with them. I will work and all those suggestion and will make more explosions happen
Click to expand...

Afraid that is a fallacy kal. If anything, you should fit more decoupling on a breadboard, because breadboards tend to introduce unwanted resistances and other parasitics. Also, by definition, a breadboard circuit is built to prove a theoretical design and the danger is that you will reject a good paper design because some secondary effect stops your breadboard from working properly. This is perhaps the biggest most common mistake that newbees make when trying to develop a circuit. I could tell story after story to illustrate this point. Remember also, that the gods are always tying to stymie your efforts, because they didn't think of electronics, and buggering up your breadboards is one of their favorite ways.

spec

https://www.ti.com/lit/ds/symlink/lm7805c.pdf
https://www.ti.com/lit/ds/symlink/lm7905.pdf

https://www.ti.com/lit/ds/symlink/lm317.pdf
https://www.ti.com/lit/ds/snvs778e/snvs778e.pdf
 
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Hi spec,

I had an interesting day. I have four different types of ICs that I had purchased the last couple of weeks or so to play with.
CD4011BE
MM7400N
SN74LS00N
SN74LS38N

I wired one by one to the board after figuring out how to use a voltage regulator and I used a red LED for a load. The results were as follows:

The top two chips worked as expected.

The two chips listed at the bottom did not perform as expected. The red LED was *on* when no voltage was supplied to either pins(both pins were left floating), when no voltage was supplied to both pins and when both pins had 5V+ supply to them. The LED was on all the time.

Then I grounded pin A and the LED went off and I measured 3V+ at output pin Y, the same when I grounded Pin B or both pins.
So I have **broken link removed**logic now.

I tried wiring the chip in so many ways and jumpering the unused inputs and nothing worked except when I grounded the pins.

What do you think?

Kal
 
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Gday kal,

kal.a said:
... after figuring out how to use a voltage regulator ...
Click to expand...

Glad to hear that you have tamed a three terminal regulator- that is another string to your bow.
An electronic engineer should know everything there is to know about the 78xxx/79xx and 317/337 three terminal regulators.


Good selection of logic chips to experiment with:
CD4011BE: quad two input NAND gate, CMOS, buffered (B) totem pole output (the CD4001 non buffered was the first 4xxx logic chip and was unbelievable. It cost about £10UK in modern money value)
7400: quad, two input NAND gate, TTL (this was the first 74xxx chip that came out- it caused a sensation and cost about £30 UK, in modern money value)
74LS00: quad, two input NAND gate, TTL low power (L) and non saturating (S), totem pole output
74LS38: quad, two input NAND gate, TTL low power (L) and non saturating (S), open collector output

I am assuming when you say that you used a red LED as a load you meant that you had connected a the cathode of the LED to the gate y output and the anode of the LED to the 5V supply line through a current defining resistor around 270 Ohms.

The first thing to say is that as all four gates are 2 input NAND and the truth table will always be as follows and that is invariant:

a_ b_ y
0_0_1
0_1_1
1_0_1
1_1_0

So, in a nutshell, the only time the output will go to a logic 0 is if both inputs are at a logic 1.
From this it follows that your attached truth table is incorrect and I have no explanation for that.

The CD4011 being CMOS is completely different to the other three TTL chips.
(1) Its input impedance is infinite, in practical terms, and if left open circuit will assume any voltage. In fact the gate could even start- you have guessed it- oscillating. You must always connect a CMOS gate inputs to either logic 1 or logic 0 levels.
(2) CMOS gates are relatively low speed, very low current devices. As a result they do not have sufficient sink current (Iol) to drive a LED directly. Although in practice most CD4xxx outputs will drive a LED, the output would be over stressed.

The inputs of 74xxx logic is quite different to CD4xxx logic. If left open circuits 74xxx inputs will assume a sort of logic 1 level. Once again you should never leave the inputs floating and they should be tied to the 5V or oV line as appropriate.

Forget the CMOS gate for the moment. So far I have implied that the logic levels for 74xxx TTL are 0V and 5V for simplicity, but this is not true.

The logic input levels are:
(1) Logic 0 = 800mV or less
(2) Logic 1 = 2V or more

The logic output levels are:
(1) Logic 0= 400mV or less
(2) Logic 1= 2.4V or more

This means that a TTl output will always drive a TTL input fully. In fact there will be a 400mV margin. (a TTL out put will properly drive 10 of its own family inputs)

CMOS is quite different.
The logic input levels are:
(1) Logic 0 = less than VCC/2
(2) Logic 1 = more than VCC/2

The logic output levels are:
(1) logic 0= VCC plus about 50mV depending on actual Iol
(2) logic 1= VCC minus about 50mV depending on actual Ioh

You can see from this that the two logic families are quite different and, in general, will not interface properly to each other (simplification gain). To get around this problem the 74CT family was developed. The T indicates, compatible with TTL.

spec

http://en.wikipedia.org/wiki/7400_series
http://en.wikipedia.org/wiki/List_of_7400_series_integrated_circuits
 
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Sorry spec, my logic table is wrong.

Here is what's happening:

ground+ground=1
A Grounded + B floating (not grounded and not high)=1
B grounded = A floating=1
A floating+ A floating=0

This to me is like a PNP transistor where the base has to be pull down to ground for it to work. That the puzzling part. It's working backwards from what it's supposed to.
 
Hy Kal,

kal.a said:
Here is what's happening:
ground+ground=1
A Grounded + B floating (not grounded and not high)=1
B grounded = A floating=1
A floating+ A floating=0
Click to expand...

Your revised logic table is correct for a two input NAND gate.

kal.a said:
This to me is like a PNP transistor where the base has to be pull down to ground for it to work. That the puzzling part. It's working backwards from what it's supposed to.
Click to expand...

Yeah, it is confusing- you make me smile: I felt exactly the same when the 7400 logic chip came out in the 1970s. Just remember that a logic gate is not like any transistor. There is no connection between the current and voltage flows on the input and output (not always true). In essence there is no difference between a current flowing into an input or a current flowing out of an input: they are just currents. In electronics, generally, you can design for any polarity of voltage or current. In the valve (tube) days this was not always possible because there is no such thing as a valve equivalent of a PNP Bipolar Juction Transistor (BJT), P type Junction FET (JFET), or P type Metal Oxide Semiconductor FET (MOSFET).

Incidentally the most basic logic functions are;
(1) NOT (Inverter)
a=0, y=1
a=1, y=0
(output is the inverse [compliment] of the input)
(2) two input OR gate (7432)
b=0, a=0, y=0
b=0, a=1, y=1
b=1, a=0, y=1
b=1, a=1, y=1
(only when both inputs are 0 is the output 0)
(3) two input AND gate (7408)
b=0, a=0, y=0
b=0, a=1, y=0
b=1, a=0, y=0
b=1, a=1, y=1
(only when both inputs are 1 will the output be 1)

I think I have said this before, but you can make any logic function imaginable, from a simple flip flop to a microprocessor, from two logic functions: inverter and a two input gate. From that it follows that you can make any logic function from an inverting two input logic gate, because they can be used as inverters.

There are three basic gates available as physical implementations: OR, AND, and EXCLUSIVE OR.
Two input EXCLUSIVE OR (7486) truth table:
b=0, a=0, y=0
b=0, a=1, y=1
b=1, a=0, y=1
b=1, a=1, y=0
(when only one input is at logic 1 will the output be logic 1)

Of course, you can make an EXCLUSIVE OR gate from NOR and either OR or AND gates.

An EXCLUSIVE OR gate allows you to do some really fancy things, but you will come to that further down the line.

spec
 
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Hi spec, hope you're having a great Sunday,

I was looking at the components I will be needing for the 12-40V version of the circuit and had to come back to this comment.
Q35 should not affect how fast Q27 turns on based on where Q32 is placed in the circuit. R24 will get V+ directly through the opto and if we're talking 40V then it will be 39.40V/470Ohms = 83mA and 3.27Watt. (even at 24V+ it's more than 1 Watt)
Also for a 40V+ supply, I will be exceeding the absolute maximum voltage of the Opto detector Vceo of 30V.
If any of this is correct, I could place R35 higher (before R24) which resolves the current issue and add a resistor to pull down the base of Q27 to turn it off quicker. But there will still be the issue of exceeding the voltage rating of the opto detector.
For that I could put a voltage divider and everything would look like **broken link removed**but I have concerns about the lack low current in case of 12V+ supply.

What do you think

Cheers
Kal
 
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