Hy Kal,
I had an excellent Sunday thanks- hope you did too. It is mother's day in the UK and our Son and his fiance visited. We had splendid three course lunch and bottle of Merlot at a Bistro owned by some friends and I am feeling fatter than ever. Later I sorted out some hardware problems on a PSU my Son has just bought and he sprinkled some magic dust on my laptop which sorted out some files that I managed to corrupt. Meanwhile the ladies discussed wedding dresses, babies and stuff like that.
Well you certainly know your way around a data sheet kal. You are quite correct- sloppy design by me.
Nice bit of data sheet sleuthing again kal. You have just detected a bit more sloppy design by me. I just looked at the first part of the data sheet and saw 70V max VCE when that was the 'not to exceed without damage VCE' rather than 'operate OK VCE', which is 30V as you say.
You are on the right lines but there appears to be an error on your schematic in that the input signal for QN1 is connected to 0V.
Once more, you are on right lines but the voltage modulation caused by the resistors in the collectors would slow the opto receiving transistors down a bit.
Post #88 shows a revised schematic of the H bridge which I hope takes care of the problems you have highlighted.
Cheers
spec
Hi spec, hope you're having a great Sunday
I had an excellent Sunday thanks- hope you did too. It is mother's day in the UK and our Son and his fiance visited. We had splendid three course lunch and bottle of Merlot at a Bistro owned by some friends and I am feeling fatter than ever. Later I sorted out some hardware problems on a PSU my Son has just bought and he sprinkled some magic dust on my laptop which sorted out some files that I managed to corrupt. Meanwhile the ladies discussed wedding dresses, babies and stuff like that.
Q35 should not affect how fast Q27 turns on based on where Q32 is placed in the circuit. R24 will get V+ directly through the opto and if we're talking 40V then it will be 39.40V/470Ohms = 83mA and 3.27Watt. (even at 24V+ it's more than 1 Watt)
Well you certainly know your way around a data sheet kal. You are quite correct- sloppy design by me.
Also for a 40V+ supply, I will be exceeding the absolute maximum voltage of the Opto detector Vceo of 30V.
Nice bit of data sheet sleuthing again kal. You have just detected a bit more sloppy design by me. I just looked at the first part of the data sheet and saw 70V max VCE when that was the 'not to exceed without damage VCE' rather than 'operate OK VCE', which is 30V as you say.
If any of this is correct, I could place R35 higher (before R24) which resolves the current issue and add a resistor to pull down the base of Q27 to turn it off quicker.
You are on the right lines but there appears to be an error on your schematic in that the input signal for QN1 is connected to 0V.
But there will still be the issue of exceeding the voltage rating of the opto detector.
For that I could put a voltage divider and everything would look like **broken link removed**but I have concerns about the lack low current in case of 12V+ supply.
Once more, you are on right lines but the voltage modulation caused by the resistors in the collectors would slow the opto receiving transistors down a bit.
Post #88 shows a revised schematic of the H bridge which I hope takes care of the problems you have highlighted.
Cheers
spec
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