LM723 PSU with 0V lowest voltage

[spec]

Hi earckens,

In addition to Les' request above, can you post the following voltages:
(1) LM723 pin 2
(2) LM723 pin 3
(3) LM723, pin7
(4) LM723, pin 9

spec

(crossed posts, earckens)

 

[earckens]

Hi spec, I wil do; you probaly mean after I did the changes to the prototype.

Thanks for your help!!
Erik

 

[spec]

Hi spec, I wil do; you probably mean after I did the changes to the prototype.

Hi earckens,

If you mean connecting Vz to Ov, yes.

By the way, if you look at the schematic in post #20, you will see the constant current system rearranged, but that is not to detract from Les' excellent detective work.

You had better get back to your missus or all three of us will all be in trouble.

spec

PS. It is best to put a light load on the PSU while you are testing: say 1K, 5W resistor or higher. UPDATE of 2016_12_08: Ignore this PS: I noticed that your circuit already has a 1.5K resistor connected across the output of the PSU.

 

[earckens]

Hi earckens,

If you mean connecting Vz to Ov, yes.

By the way, if you look at the schematic in post #20, you will see the constant current system rearranged, but that is not to detract from Les' excellent detective work.

You had better get back to your missus or all three of us will all be in trouble.

spec

Hi spec, quick message from upstairs; the last measurements I had given were with Vzener connected to ground.

I will have a look back at post 20 schematic tomorrow (or tonight if I wake up ), I think indeed you already had rearranged something to that effect back then if I remember well.. To bad I had overlooked.. sorry!

Have a great evening,
tomorrow the follow-up,
cheers,
Erik

 

[Les Jones]

Hi Erik,
If the CS pin (NPN transistor emitter) goes to the input side of the current sense resistor then the current limit would start when there was about 0.6 - 0.7 volts across the current sense resistor. This would be 5 amps when CL (NPN transistor base) was at the output side ground potential. I was aiming to say that we would need a negative voltage to adjust the current limit. (To balance it out.) But I see now that we are helping the current limit transistor to turn on. So when the voltage A (current limit) is about 0.6 - 0.7 volts we will have set the current limit to zero. So it should work by moving the CS connection to the input side of the current sense resistor. In case we still have a problem also note the voltsges on the + and - comparitor inputs (Pins 4 & 5)

Les.

 

[earckens]

BINGO!!! CS (pin 3) and cap 2.2nF CS side connected before the sensing resistor 0.12ohm, measurements attached.

There is an issue with the voltage pot: I use a 5k but the maximum voltage is already reached when the value is 2.6k: is there any means to get the full range sensed between 0 and 5k ohm instead of 2k2?

PS: I told home about the great help I am getting here so the current nightsession is forgiven

 

[earckens]

Now all this is with 24Vdc after the rectifier, I now only use one of both secondary coils. If I want to use both secondary coils in series I will get about 46Vdc: I would need to use a zener diode to reduce the supply voltage to the LM723.
I will work out a circuit proposal for your approval.
I wonder if I also would not need to recalculate the voltage feedback resistors?

Have a good night,
Erik

 

[earckens]

In attachment my proposal for a pcb with 46Vdc output from the rectifier. Because the LM723 in the current configuration cannot drive more then 40Vdc (maximum operating voltage) I used a 39V zener to limit the supply voltage to the IC, and therefore also limit the output voltage to something below 40Vdc.

Does this circut make sense? Any recalculations needed on the voltage feedback resistors? Other components?

Have a good night
Erik

 

[spec]

In attachment my proposal for a pcb with 46Vdc output from the rectifier. Because the LM723 in the current configuration cannot drive more then 40Vdc (maximum operating voltage) I used a 39V zener to limit the supply voltage to the IC, and therefore also limit the output voltage to something below 40Vdc.

Hi earckens,

Q1 needs to supply 1/20 of the power supply output current, but it would not be able to supply much current due to R2 (500 Ohms).

spec

 

[earckens]

Hi earckens,

Q1 needs to supply 1/20 of the power supply output current, but it would not be able to supply much current due to R2 (500 Ohms).

spec

I miscalculated; this will not work: I would need a 50W zener and a 5 ohm resistor!

Apart from another transformer, what are the options?

 

[earckens]

To reduce the voltage in the PSU from +/-46Vdc (rectifier output) to about 36...39Vdc fixed voltage (IC and other components supply), with current varying between 200mA and 700mA: series or shunt regulator?

TIP41C or TIP120 darlington?

 

[spec]

I miscalculated; this will not work: I would need a 50W zener and a 5 ohm resistor!

Apart from another transformer, what are the options?

I have a good solution, but I didn't post it in case you wanted to investigate a solution yourself. But as you asked I will post my solution.

To reduce the voltage in the PSU from +/-46Vdc (rectifier output) to about 36...39Vdc fixed voltage (IC and other components supply), with current varying between 200mA and 700mA: series or shunt regulator? TIP41C or TIP120 Darlington?

Pretty clever approach- I had not thought of using a Darlington (by the way, we should be talking about a TIP42C and TIP127, both of which are PNP transistors rather than NPN).

https://www.onsemi.com/pub_link/Collateral/TIP41A-D.PDF
https://www.onsemi.com/pub_link/Collateral/TIP120-D.PDF

spec

 

[spec]

POST Issue 2 of 2016_12_08

Hi earckens,

The schematic below shows your schematic with the mods I suggest to:
(1) Cater for the 40V supply limit of the LM723 (the LM723 supply voltage has been reduced to 18V)
(2) Provide sufficient base drive current for the output power transistors
(3) Allow the PSU output voltage to only be limited by the 46V input voltage across the reservoir capacitors.

spec

 

[Les Jones]

Hi spec,
Shouldn't the left hand end of the 470R resistor on the emitter of the left hand Q2 (The added transistor.) go to pin 11 (VC) rather than pin 12 (V+) and V+ conected to +18 volts. (As you have said in the text of this post.) I like your idea of the common base stage. I had been thinking of effectively replacing the internal pass transistor with an external transistor with a higher voltage rating and its base drive would be via the base emitter juction of the internal pass transistor. I was thinking of just leaving the collector of the internal pass transistor disconnected as we would not need the extra current gain. Your solution saves having to have an external 6.2 volt zener. (That my idea would require.)

Les

 

[spec]

Hi Les,

Shouldn't the left hand end of the 470R resistor on the emitter of the left hand Q2 (The added transistor.) go to pin 11 (VC) rather than pin 12 (V+) and V+ conected to +18 volts. (As you have said in the text of this post.)

Thanks again Les- my excuse is incompetence. (but messing with a PDF in Photoshop is a bit demanding and I find it difficult analyzing the circuit when it does follow the layout rules- sorry earckens)

I like your idea of the common base stage. I had been thinking of effectively replacing the internal pass transistor with an external transistor with a higher voltage rating and its base drive would be via the base emitter junction of the internal pass transistor. I was thinking of just leaving the collector of the internal pass transistor disconnected as we would not need the extra current gain. Your solution saves having to have an external 6.2 volt Zener. (That my idea would require.)

Hmm, I suspect that your approach would be neater. I don't think you would need an extra external Zenner- just feed the base of the new NPN transistor from Vz.

spec

 

[spec]

Hi Les,

Schematic of post #113 updated in line with your findings- could you give it a check to make sure I haven't made any more errors.

Thanks

spec

 

[earckens]

Hi spec and Les, I sure find it amazing to have such great companions in my stride! What a lot of thinking has been had here, I sure wish I could invite you to the local whisky bar here close by (real Scottish pub!).

To spec: very good idea to use the Q4 as emitter follower before the initial PNP drive stage. This way the supply goes all the way to 46V.

1. But does the supply also go all the way down to 0V?

(I think it does: Vbe Q1 must be 0V, only as Q4 is closed and Vc Q4 is 46V. But I am not sure?)

2. Where in the original design the PNP driving stage had its emitter on Vsupply (from the rectifier) and the transistor was driven at the base by Vc (pin 11) you now drive a NPN with its base at fixed 18V using the emitter at Vc (pin 11): Vc must go low to get an output voltage on the PSU, same in both scenarios: is this the correct interpretation?

3. You use a 680R for the 18V zener: only 40mA required for both zener and load at 18V?

4. Attached is my idea I had worked out earlier today for a series regulator instead of a zener driven supply voltage (before I saw your work of today here just a short while ago): would you give me your critical review please?

PS 1: spec, how do you manage to include a drawing in your post?
PS 2: spec, I promise, as soon as this is finished here, and my prototype redy I will get this drawing made in Eagle.

 

[Les Jones]

Hi spec,
I think having to modify the drawing using photoshop a reasonble excuse. I avoid using it unless there is something I can't do with Paintshop pro. And now using Paintshop pro now means going back to an XP system as the Corel version that runs on windows 7 is not as good. I did wonder about connecting the base to Vz but the non liniarity as the zener just starts to conduct may cause instability. In the original version you kept the zener biased into conduction with a resistor to the positive rail. This would not now be possible using the internal zener. I think yours and my ideas are equaly valid solutions. I did not look at the modification to look for mistakes but just to see how you had solved the problem. The only thing I can see that we need to point out to Eric is that the base of Q4 is also connected to +18V
Edit, Hi Eric, I have just read your post #117. Q4 is not an emitter follower it is a common base amplifier. It works by keeping the base at fixed voltage an pulling the emitter more negative which causes the collecter current to increase.
Edit 2. I have just has a look at your new circuit. It will subject the collector of the internal pass
transistor to the full 46 volts. Also the 39 volts you are using to power the LM723 is closer to its maximum rating than I would like.
Les.

 

[spec]

Below is a schematic showing the arrangements of the output transistor drive in a form that is a lot easier to follow (posted before posts #117 & #118 were visible).

spec.

 

[spec]

Hi earckens,

Hi spec and Les, I sure find it amazing to have such great companions in my stride! What a lot of thinking has been had here, I sure wish I could invite you to the local whisky bar here close by (real Scottish pub!).

That sounds like a great idea, but I would rather sample some of your national brews.

1. But does the supply also go all the way down to 0V?

Yes, it does.

2. Where in the original design the PNP driving stage had its emitter on Vsupply (from the rectifier) and the transistor was driven at the base by Vc (pin 11) you now drive a NPN with its base at fixed 18V using the emitter at Vc (pin 11): Vc must go low to get an output voltage on the PSU, same in both scenarios: is this the correct interpretation?

Absolutely correct

3. You use a 680R for the 18V Zener: only 40mA required for both zener and load at 18V?

I haven't worked out the current budget around that area, but yes, 40mA sounds about right.

PS 1: how do you manage to include a drawing in your post?

Only certain files types will display, mainly .jpg and .png. .pdf will only show a clickable icon.

Just upload the file that you wish to display. If you do not click FULL only a clickable icon will be displayed as for .pdf, but if you click FULL the image will be displayed.

PS 2: I promise, as soon as this is finished here, and my prototype ready I will get this drawing made in Eagle.

I hate to carry on, but it is almost impossible to work with a circuit that is not laid out according to the rules and the time when you really need a good layout is when you are developing a new circuit. With a good schematic layout (see post 119), problems are obvious and take seconds to fix, but with a spaghetti layout not so.

End of moan.

spec