rs14smith
Member
What if you run the each of the Op amp outputs thru (two) two input Nand gates. Attach opposing Op amp outputs for the second input of each gate.
I don't quite understand how to implement that, like I know what you are talking about, but am a little confused by your second sentence.
You said attach opposing Op amp outputs for the second input of each gate. Do you mean the source or drain of the FETs? If possible when you get time, could you possibly sketch up a basic schematic as that would help a lot