Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.
Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.
switching circuit using 555 timer is shown in the attachment bellow.
i) determine the limit on k for which the circuit has at least one DC steady state.
please help. The circuit diagram is found in the attachment bellow
Interesting circuit. Certainly non-standard, but still a valid one.
I doubt that many (probably none) of the plethora of online 555 calculators would be able to give an answer. Nor will the standard equations in the data sheet. And I expect that that may be the reason it was chosen for a test question. The student will have to understand what's inside the chip to find the answer.
And that is what you will need to do mbipeh. Dig up a datasheet for the NE555. (Not one of the cmos versions.) You don't need to understand it at the transistor level, the internal block diagram will be enough.
Then redraw the test question and the internal schematic as one. From that point it's simple circuit analysis. You just need to find what value of K (as a ratio against R) defines the line between when the 555 oscillates, and when it doesn't.
Don't forget to factor in that resistor connected to pin 5. It's effect is significant.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
