giftiger_wunsch
New Member
What is not realised with "legitimate current", is that if you as an engineer 'covered yourself' by setting each IC output driving a load for 24.99 mA, but there are 16 outputs, you'd have an extra 0.4 A supply current! There is a thing called 'maximum package power dissipation', and you've probably exceeded it by this extra power.
Well, surely this depends at what point in the circuitry of the board the maximum current becomes an issue? I would imagine the 8mA limit on the parallel port bit outputs is set so low to avoid the effect you describe: if the total current leaving *all* of the terminals must be under 8mA, it's not exactly an incredibly useful board. There are 5 8-bit parallel ports, so it would make more sense that the total current through the circuit supplying these 40 terminals should be less than ~320mA, i.e. that each terminal can handle 8mA simultaneously. I assume this is what you were getting at.
It's certainly worth checking that the 8mA is what's allowed to flow through each parallel port bit terminal though.
Anyway, did you understand my explanation of using PA0 and PA1 as complementary outputs? Now that you know what I was trying to achieve, would my schematic achieve this, or would I need to make some adjustments?
Edit:
marcbarker said:can you edit the previous posting and add a schematic
Done.
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