Continue to Site

Welcome to our site!

Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

Register Log in
  • Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

Hello, please can somebody help me this circuits cpu to connect with display and keyboard

Status
Not open for further replies.
unclejed613 said:
you might want to look at this: https://archive.org/download/tvtcb_doc/tvtcb.pdf this was a display and keyboard made with TTL chips. from what i can tell from your posts that's pretty close to what you want. basically it's a video terminal that you can use to "talk" with the CPU hardware.
Click to expand...

The "computer" he's trying to build uses a very specific bit-to-pixel mapped output. It would need the operating system rewriting to use any other form of display.

The only practical physical version recreation of the original HDL emulator I can think of is by using a dual-port RAM with the output side driven from counters using timing taken from a video sync generator circuit.

There are various more practical designs available for DIY machines, that can be built with completely off the shelf parts & no great hassle, as there will be with this.. Though I've got to admit it would be quite impressive to see it realised entirely in physical logic!
 
there's this kit https://gigatron.io/
that does a CPU and graphics with TTL chips. the kit is 149.50 euros
 
rjenkinsgb said:
You could use the timing generator, row counters and column counters from an old design of mine here (on page 25 of the pdf, 367 in the original volume).

Note that I do not have time to start drawing things out for you or answer questions that need massive detail - you need to study the logic & data sheets for the devices, plus the "screen" module description in the original lecture series you are working from.

However, if you do not understand the basics such as logic signal & bus connections between devices or circuit blocks, I do not see how you can have made any physical prototypes of the "computer" design??


The rest of the test card generator design info is in these issues of the magazine:
Click to expand...
thank you very much, i read fast is so beatifull book(good explained, +info), o my friend now one week i am seraching
rjenkinsgb said:
You could use the timing generator, row counters and column counters from an old design of mine here (on page 25 of the pdf, 367 in the original volume).

Note that I do not have time to start drawing things out for you or answer questions that need massive detail - you need to study the logic & data sheets for the devices, plus the "screen" module description in the original lecture series you are working from.

However, if you do not understand the basics such as logic signal & bus connections between devices or circuit blocks, I do not see how you can have made any physical prototypes of the "computer" design??


The rest of the test card generator design info is in these issues of the magazine:
Click to expand...
thank you very muchh, i read fast is such tutorial
 
michael1978 said:
thank you very much, i read fast is so beatifull book(good explained, +info), o my friend now one week i am seraching

thank you very muchh, i read fast is such tutorial
Click to expand...
ooo sorry i send 2 times, something wrong with my interent, like i say, i search on the internet i found nothing good, i have just one more quesion now i know how to generate signal and timing, you know the information come out the RAM, but how do i get the generator circuit about vsync and hsynsc where? there are only 16pixel of informaion out of memory? thanks one time have a nice sleep
 
rjenkinsgb said:
The "computer" he's trying to build uses a very specific bit-to-pixel mapped output. It would need the operating system rewriting to use any other form of display.

The only practical physical version recreation of the original HDL emulator I can think of is by using a dual-port RAM with the output side driven from counters using timing taken from a video sync generator circuit.

There are various more practical designs available for DIY machines, that can be built with completely off the shelf parts & no great hassle, as there will be with this.. Though I've got to admit it would be quite impressive to see it realised entirely in physical logic!
Click to expand...
sorry this doual-port RAM, i have to connect with signale of RAM output and video sync generator right?
 
unclejed613 said:
there's this kit https://gigatron.io/
that does a CPU and graphics with TTL chips. the kit is 149.50 euros
Click to expand...
ooh my gigatron 8 bit guy, i have in my home i buy , but i dont find nothing intersting when i dont know how it works how its programming
this course nand2tetris is perfect if he explaing all everything, because you learn new thing for example how to build how to programming, so you have learn compiler assembler pc, sooo in the futur you know everything how si going….good night
 
michael1978 said:
sorry this doual-port RAM, i have to connect with signale of RAM output and video sync generator right?
Click to expand...

If you look at the signals connecting to the "screen" block, they are the same as with the RAM block, except at a different address area (SelScr rather than SelRAM from the address decoder block).

The CPU stores the pixel data in RAM, but a different block or unit of RAM to the normal working memory.
Note that the address bus is connected to the screen to control what word of the screen RAM is written or read.


In the simulator, the screen RAM is mapped to visual pixels by software.
To do it in hardware, you need dual-port RAM that can be read independently with timing synchronised to the required video sync signals.

eg. The column counter (something like in my testcard circuit) addresses pixels across the screen. For your display, you could use the lowest four bits to address a 16 way multiplexer which selects one but from the addressed word as output, then the rest of the bits of the column count become then low address to the RAM.

512 pixels / 16 bits = 32 words; 5 bits address for the column address of a word within one pixel row.

The next 8 RAM address bits are the row address, to give the full 512 x 256 pixel screen.
 
rjenkinsgb said:
If you look at the signals connecting to the "screen" block, they are the same as with the RAM block, except at a different address area (SelScr rather than SelRAM from the address decoder block).

The CPU stores the pixel data in RAM, but a different block or unit of RAM to the normal working memory.
Note that the address bus is connected to the screen to control what word of the screen RAM is written or read.


In the simulator, the screen RAM is mapped to visual pixels by software.
To do it in hardware, you need dual-port RAM that can be read independently with timing synchronised to the required video sync signals.

eg. The column counter (something like in my testcard circuit) addresses pixels across the screen. For your display, you could use the lowest four bits to address a 16 way multiplexer which selects one but from the addressed word as output, then the rest of the bits of the column count become then low address to the RAM.

512 pixels / 16 bits = 32 words; 5 bits address for the column address of a word within one pixel row.

The next 8 RAM address bits are the row address, to give the full 512 x 256 pixel screen.
Click to expand...
HI
i build like i understand you a 16 way MUX, so i did like you say

sorry what come next to circuit i build
something to adress memor spmething to output mux
where the dual - RAM where to connecte to adress memory or out from mux, and generatoroutput from mux or adress memory
please help to build this circuits(we are almost finish;--)
 
this i build
ADRESS SELECT FOR RAM.png
 
michael1978 said:
we are almost finish;--)
Click to expand...
You are a VERY long way from finished!

You would need to build the whole clock generator, sync timing and column / row counter system, just to start with.

You still have not posted any photo of actual _physical_ builds of parts, that you earlier said you had breadboarded.
 
rjenkinsgb said:
You are a VERY long way from finished!

You would need to build the whole clock generator, sync timing and column / row counter system, just to start with.

You still have not posted any photo of actual _physical_ builds of parts, that you earlier said you had breadboarded.
Click to expand...
Hello
sorry for my late answer
i (hope) will put the photo tomorow… because of time

i read a book
i try to study your book in page 25
i try to decode ;-)
like i read that book and your schematic i see
that you need a clock, counter, ram generator, shift register and finish result
i do experiments in proteus(is my first time that i use)
greetings
 
rjenkinsgb said:
If you look at the signals connecting to the "screen" block, they are the same as with the RAM block, except at a different address area (SelScr rather than SelRAM from the address decoder block).

The CPU stores the pixel data in RAM, but a different block or unit of RAM to the normal working memory.
Note that the address bus is connected to the screen to control what word of the screen RAM is written or read.


In the simulator, the screen RAM is mapped to visual pixels by software.
To do it in hardware, you need dual-port RAM that can be read independently with timing synchronised to the required video sync signals.

eg. The column counter (something like in my testcard circuit) addresses pixels across the screen. For your display, you could use the lowest four bits to address a 16 way multiplexer which selects one but from the addressed word as output, then the rest of the bits of the column count become then low address to the RAM.

512 pixels / 16 bits = 32 words; 5 bits address for the column address of a word within one pixel row.

The next 8 RAM address bits are the row address, to give the full 512 x 256 pixel screen.
Click to expand...
hello
here what i work
i am gonna make your circuit for display controller ;-)))) he goona work for my processor?(
i try to understand and to build, when i gonna build i gonna send you email right ) ohh Goodnight.....​
ALU.png
JMPC.png
PC.png
WORK.png
 
Your circuit is a few boards full of empty sockets?
 
You need spaces between the sockets - some IC bodies are too long to fit with the pins. Gaps are also useful as wiring "lanes" so the connections you add are not crossing other solder joints - or places you will need to add more connections to later.

Also you have all 18 pin 0.3" pitch, no allowing for the different size ICs.
You need to fully plan things and work out the exact IC types (and packages), plus allowing for other components, before you start building.

This is a practical example, though built with wire-wrap. There are decoupling capacitors under every IC, hidden inside the IC sockets.
The ICs are set out with reasonable spacing, on a ground-plane board to avoid electrical noise.

https://flic.kr/p/JHgJwf
 
Status
Not open for further replies.

Similar threads

E
  • Question
Help with my project please
Replies
13
Views
5K
danadak
danadak
M
  • Question
Help with time released lid
Replies
11
Views
3K
markuk75
M
S
  • Question
Need help with spst toggle to momentary
Replies
5
Views
4K
crutschow
crutschow
GH Crash
  • Question
Tiny display needed
2
Replies
26
Views
7K
GH Crash
GH Crash
E
  • Question
Home security system with motion sensors, alarms and notifications systems
Replies
4
Views
2K
rjenkinsgb
rjenkinsgb

Latest threads

New Articles From Microcontroller Tips

Back
Top