Help needed for Induction Heater circuit

ramuna

Member
Hello friends,
I am attempting to design a 1 kW induction heater operating at 979Hz. Two IRFP250N mosfets are operating in Push-Pull. The parallel resonating capacitor of 33uF is on the primary side. The 2uH induction coil is on the secondary side. The Push-Pull transformer has a split primary and the primary to secondary turns ratio is 20:1. The power supply voltage is 60V DC. I have been simulating the circuit in LTSpice.

My simulation shows a sharp current spike on mosfet switch ON. My question is, how can I eliminate/greatly reduce this spike.

I have uploaded a zip file, which contains the LTspice *.asc file for the simulation, the *.spi file for the IRFP250N and a screendump of the simulation which shows the current spike. In practice I will be using a bank of 2 or 3 IRFP250s per split primary, but for the present I would like to know how to remove/reduce the current spike. Many thanks in advance!

NB: Please amend the spice directive giving the location of the IRFP250N spi file in the Inductheat_1.asc simulation file to match the actual location of the file on your computer.
 

Attachments

  • InductHeat.zip
    116.5 KB · Views: 8
The Q factor of the tuned circuit is so low that resonance won't happen. The Q from the inductor is 2*π*L/R

That is 2 * π * 0.000002 / 0.5 = 0.025 which is so low that it can't be considered a tuned circuit at all.

An induction heater will be basically resonating with no object in range, and when an object is present, that will damp the resonance.

Some other points:-

I don't understand what the 0.2 H inductor L5 is supposed to simulate.

I think that the current spikes are just the charging and discharging of the capacitor. With the low Q, the transformer has effectively got a resistive load, which is the square wave and the spikes are on top of that.
 
Thank you Lightium & Diver300 for your replies. I applied the comments made by Diver to my circuit, making the following changes:
(1) Eliminating the RF Choke L5
(2) Eliminating the capacitor C1
(3) Changing the load resistance R3 to 0.2R

With these changes in place I simulated the circuit in LTspice. The MOSFET current spike is now very brief and reduced. The power of the spike (current through mosfet x drain_source voltage) is a VERY brief spike of under 2kW. I have attached a screen shot of the simulation graphs to this post.

My question is, are these realistic results (see the power across the load resistance in the upper plot_plane) ?
And if I am making a mistake, please identify it.
 

Attachments

  • Inductheat_NoCap_LTS_ScreenDump.jpg
    174.9 KB · Views: 0
Cookies are required to use this site. You must accept them to continue using the site. Learn more…