Thanks for re-opening the thread Jim.
I hate to leave a discussion in limbo. So, after a 2-1/2 year hiatus, I have an update. I continued to work on this for a few days after my last post, trying to get the main VCO and phase comparator to work, but it was an exercise in frustration, and I set it aside. However, I did order some of the parts that I needed.
Also during that time, I would occasionally look over my design calculations, and eventually found some errors in my VCO design.
A few months ago, I built a PCB for the reference oscillator and blocking oscillator divider, since they were working fine, and were unlikely to change. I also made some breadboard friendly tube sockets. This made for a much cleaner experimental setup.
This week, I rebuilt the circuit and had another go. Trying to design the PLL loop filter involved a lot of guessing, because there were a couple of parameters that were virtually impossible for me to measure. After a lot of futile tinkering, I gave up on a pentode based phase detector circuit and replaced it with completely different design using a beam deflection tube. Then, more and more tinkering. Last night, I was just about ready to admit defeat, and rip it all apart. But before giving up, I made a couple more minor changes. Lo and behold, it started to work.
There is still a lot more to be done, but at least I now know that it's not impossible. The capture range is not very good yet. I also need to come up with some kind of indicator that shows when it's locked on frequency. At the moment, I have to rely on the scope and frequency counter.
In the photo, the reference clock is on the small PCB in the upper left. The rest of the circuit is on the breadboard. The frequency counter in the upper right shows the output locked on 1000.000 kHz (bottom line on the counter display). And yes, that's an honest reading.
See the attachment for the current schematic:
The reference oscillator has been discussed previously. I've now got the proper 20kHz crystal installed, and after passing through the blocking oscillator ÷4 frequency divider, It produces a very stable and precise 5kHz reference clock with narrowish (~150ns) pulses.
(The JK flip-flop, although rather fun, was unnecessary, and has been relegated to another forthcoming project.)
The ref clock pulses go to the control grid of the phase comparator tube. The tube is biased so that it's cut off except when it receives a clock pulse. The signal from the VCO is fed to one deflector plate. (It's not necessary to drive both deflectors; the voltage difference between the deflectors is all that matters.) The output at the plates is a pair of differential pulses that correspond to the phase relationship between the ref clock pulse and the VCO signal. These drive the 4 diode charge pump to produce the VCO control voltage. The cathode of the top diode is connected to the cathode of the reactance tube to prevent the control voltage from rising above the cathode voltage, and thus prevents the grid of the reactance from going positive (relative to the cathode). The reactance tube acts as a voltage controlled capacitance in parallel with a parasitic winding on the oscillator coil. Thus, changing the grid bias on the reactance tube changes the frequency of the oscillator. Other than the parasitic winding, the main oscillator is a standard Hartley circuit. The oscillator coil is a universal replacement type oscillator coil used in medium wave tube radios.