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Signal conditioning problem

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Hi, I've a Load cell used for scalers , its output is 0 to 80mV and i've a PLC which has an ADC works from -10V to 10V , 12Bit , how can i condition the load cell signal to this ADC ?

Thanks so much
 
Hi, I've a Load cell used for scalers , its output is 0 to 80mV and i've a PLC which has an ADC works from -10V to 10V , 12Bit , how can i condition the load cell signal to this ADC ?

Thanks so much

hi,
Do you want the 0 to +80mV to give -10V thru +10V after the level shifting op amp.?

That is: 0V in = -10Vout, +40mV = 0Vout, +80mV =+10Vout
 
Thanks for the reply
yea exactly this is what i want =)


hi,
You require a OPA ,say type CA3240 [dual] operating from +/-15Vdc rails.

The first half of the CA3240 OPA as a level shifter and inverting amplifier to give say -/+2V equivalent to 0 and 80mV.

The second half the CA3240 OPA as an amplifier and invertor to give +/-10V

Do you follow this OK.?
 
Yea, but i only have LM324 on my hand now , can it does the task ?
also how can an op-amp does the level shifting?

hi,
I'll look at the LM324 spec and post a circuit diagram tomorrow showing the method.:)
 
Yea, but i only have LM324 on my hand now , can it does the task ?
also how can an op-amp does the level shifting?

An LM324 is a really low spec device, essentially a quad 741.

As you're hoping for 12 bit resolution, I would suggest you need a MUCH better device than that, and incredibly careful layout.
 
Thanks so much eric , you always help me :)

hi,
Its important to note what Nigel has said about the poor LM324 spec,

The diagram I post will specify a OPA with a mid range specification, if you use an inferior device you will get inferior performance.

The CA3240 is less than £1.0 GBP its not expensive.:)
 
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I'll look thru your link.

EDIT:

I would choose the NE5532 low noise dual OPA.

As you are looking for 12bits.. from 0 to 80mV, you require a low noise opa.OK

The layout of your pcb is important in order to minimise any noise.
 
Last edited:
hi,
Look over this drawing.

Care must be taken with the actual pcb layout.

The signals are being amplified by 250, so any induced electrical noise will cause jitter on the ADC output.

The circuit has been tested using a CA3240 and gives acceptable results.

Any questions, please ask.:)
 

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