Uni Project Advice and Help

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Nopse

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I need to do the following for a project at uni:
Fixed frequency divider by 33. The counter used will have the synchronous R input. Only circuits will be used
from the HCT/HC series. The oscillator will provide two rectangular signals with frequencies of 5Hz and 435kHz respectively
and a manual clock signal.

This is what I've done so far. Everything in the left side of switch 3 is mandatory. I'm new to Proteus. The simulation doesn't work, not even the first led lights up. Can someone help or give some advice please?
 

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To divide by 33, you need to break it down into two steps. First, divide by 11 and then divide by 3.

There is a classic d-type flipflop to divide by 3 with a 2-input nor gate.


Then you can use a preloadable binary 4-bit counter to count out 11 pulses and reload the preset. To keep it simple, I preloaded a binary "five" and connected the outputs (Q0 to Q3) to an NAND gate. Causes the counter to reload the preload values in the next clock cycle - it then counts off 10 more clock cycles to get to 11 pulses before repeating he preload at 15 (0x1111 binary) again.


In the following, the input clock is set to 330Hz, the first stage, using the counter, divides by 11 to get to 30Hz.

The second stage uses the two d-dupe flip flops from a quad flipflop chip and an NOR gate to divide by 3 and bring the 30Hz output of the previous stage down to 10Hz.

The four chips are available in 74HC or 74HTC versions.

 
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I have NAND gate 4011, synchronous 4 BIT counter 74HCT161 or 74HCT193 synchronous Up/Down with dual clock and clear, but i dont know if they're good, and i have only Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset. Maybe i can try to find some new libraries.
 
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I only used 330Hz because it made the math simple to see if the first stage divided by 11 correctly (330Hz/11 = 30Hz) and the second stage divides by 3 to get 10Hz. Your oscillator input will just give different output frequencies. The connections are the same.
 
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